ECE 511
ECE 511 - Computer Architecture
Spring 2024
Title | Rubric | Section | CRN | Type | Hours | Times | Days | Location | Instructor |
---|---|---|---|---|---|---|---|---|---|
Computer Architecture | CSE521 | A | 69418 | DIS | 4 | 1400 - 1520 | T R | 2015 Electrical & Computer Eng Bldg | Jian Huang Junhao Pan |
ECE416 | ONL | 0 | - | ||||||
ECE462 | ONL | 0 | - | ||||||
ECE511 | ONL | 0 | - | ||||||
Computer Architecture | ECE511 | A | 69417 | DIS | 4 | 1400 - 1520 | T R | 2015 Electrical & Computer Eng Bldg | Jian Huang Junhao Pan |
Computer Architecture | ECE511 | OND | 76150 | OD | 4 | 1400 - 1520 | T R | Jian Huang | |
ECE546 | ONL | 0 | - | ||||||
ECE584 | ONL | 0 | - |
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Official Description
Advanced concepts in computer architecture: design, management, and modeling of memory hierarchies; stack-oriented processors; associative processors; pipelined computers; and multiple processor systems. Emphasis on hardware alternatives in detail and their relation to system performance and cost. Course Information: Same as CSE 521. Prerequisite: ECE 411 or CS 433.
Subject Area
- Hardware Systems
Course Director
Description
Advanced concepts in computer architecture; design, management, and modeling of memory hierarchies, stack-oriented processors, associative processors, pipelined computers, and multiple processor systems; and focuses on hardware alternatives in detail and their relation to system performance/cost.
Notes
Same as CSE 521.
Topics
- Processor design: memory hierarchy; bus, cache, and shared memory; disk arrays, pipelining and superscalar techniques; reducing branch penalties; multivector computers
- Parallel array processors: SIMD computers; interconnection networks; systolic arrays
- Multiprocessors: program and network properties; scalability issues; performance evaluation; caches and consistency issues; parallel programming and compilers; scheduling algorithms
- Distributed-memory multicomputers: architecture; distributed shared memory; routing and network design issues; load balancing/data mapping algorithms; performance evaluation and visualization; design of parallel algorithms; scalable, multithreaded, and dataflow architectures; applications
- Distributed processing: distributed operating system; load balancing algorithms
Detailed Description and Outline
Topics:
- Processor design: memory hierarchy; bus, cache, and shared memory; disk arrays, pipelining and superscalar techniques; reducing branch penalties; multivector computers
- Parallel array processors: SIMD computers; interconnection networks; systolic arrays
- Multiprocessors: program and network properties; scalability issues; performance evaluation; caches and consistency issues; parallel programming and compilers; scheduling algorithms
- Distributed-memory multicomputers: architecture; distributed shared memory; routing and network design issues; load balancing/data mapping algorithms; performance evaluation and visualization; design of parallel algorithms; scalable, multithreaded, and dataflow architectures; applications
- Distributed processing: distributed operating system; load balancing algorithms
Same as CSE 521.
Texts
K. Hwang, Advanced Computer Architecture: Parallelism, Scalability, Programmability, McGraw-Hill, 1993.
Journal and conference articles from current literature.
Journal and conference articles from current literature.
Last updated
2/13/2013