ECE 483

ECE 483 - Analog IC Design

Spring 2024

Analog IC DesignECE483L33973DIS31000 - 1120 M W  218 Ceramics Building Pavan Kumar Hanumolu
Analog IC DesignECE483ONL76214OLC31000 - 1120 M W    Pavan Kumar Hanumolu

Official Description

Basic linear integrated circuit design techniques using bi-polar, JFET, and MOS technologies; operational amplifiers; wide-band feedback amplifiers; sinusoidal and relaxation oscillators; electric circuit noise; application of linear integrated circuits. Course Information: 3 undergraduate hours. 3 graduate hours. Prerequisite: ECE 342.

Subject Area

  • Integrated Circuits and Systems

Course Director


Introduction of analog IC design using Bipolar and CMOS technologies; operational amplifiers; feedback and stability; circuit noise; sinusoidal and relaxation oscillators; application of analog integrated circuits.


To teach Electrical Engineering seniors basic analog IC design skills.


  • Large and small signal analysis
  • Op amp design
  • Closed-loop stability of op amp
  • Electric circuit noise
  • Feedback amplifiers
  • Oscillator

Detailed Description and Outline

To teach Electrical Engineering seniors basic analog IC design skills.


  • Large and small signal analysis
  • Op amp design
  • Closed-loop stability of op amp
  • Electronic noise
  • Feedback amplifiers

Computer Usage

Using SPICE to simulate ac and transient responses of analog circuits for the homework; high-performance op-amp design for the term project.

Topical Prerequisites

  • Bipolar and MOS device operation
  • Basic circuit theory; KCL, KVL, Laplace transform, and Bode plot
  • Elimentary amplifier stages
  • Feedback stability criteria; magnitude and phase margin
  • Circuit simulation program; SPICE


Gray, Hurst, Lewis and Meyer, Analysis & Design of Analog ICs, 5th ed., Wiley, 2001.

ABET Category

Engineering Science: 2 credits or 67%
Engineering Design: 1 credit or 33%

Course Goals

This course is a senior elective for electrical engineering majors. The goals are to introduce basic transistor circuit design concepts using CMOS, to give students practical design experience with design examples and to make electrical engineering majors ready for analog integrated circuit design tasks.

Instructional Objectives

A. By the time of Midterm Exam (after about 20 lectures), the students should be able to do the following:

1. Understand the large and small signals and use MOS transistor models. (1)

2. Estimate driving-point small-signal resistance. (1,7)

3. Identify three basic amplifier configurations: common source, common gate and common drain and their derivates. (1,7)

4. Understand and estimate the gain and input/output resistances of two-stage amplifiers. (1,7)

5. Use two-stage amplifier configurations and understand the differential pair and its offsets and common-mode rejection. (1)

6. Design current sources and mirrors for integrated circuits (2,7)

7. Perform DC and AC analysis of the standard operational amplifier and understand high performance operational amplifier design for low offset, and noise. (1,7)

B. By the time of Final Exam (after 42 lectures), the students should be able to do all of the items listed under A and B, plus the following:

8. Understand the gain-bandwidth concept and frequency response of basic amplifiers. (1)

9. Estimate dominant pole frequencies using pole splitting Miller effect and the zero-value time constant method. Extend the concepts to understand the frequency response of operational amplifiers. (1,7)

10. Use Bode plots to estimate the phase margin of operational amplifiers in feedback. Understand operational amplifier frequency compensation. (1,7)

11. Estimate the transient settling time of amplifiers and understand the slewing and settling behaviors. (1,7)

12. Design high-performance operational amplifiers with high slew rates and understand other variations in the operational amplifier design. (2,7)

13. Identify circuit noise sources from active and passive devices and handle noise power spectral density. (1)

14. Estimate circuit noise density, signal to noise ratio. (7)

Last updated

7/20/2018by James Andrew Hutchinson