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Janak H Patel
Janak H Patel

Administrative Titles

Donald Biggar Willett Professor Emeritus
(217) 333-6201
250 Coordinated Science Lab

For more information


  • PhD - Electrical Engineering, Stanford University 1976


Patel’s research contributions include Pipeline Scheduling, Cache Coherence, Cache Simulation, Cache Data Prefetch, Multiprocessor memory modeling and analysis, Interconnection Networks, On-line Error Detection, Reliability analysis of memories with ECC and Scrubbing, Design for Testability, Built-In Self-Test, Fault Simulation and Automatic Test Generation. Patel is the inventor of the well known Illinois Cache Coherence Protocol and Illinois Scan Architecture, both are used heavily in most modern microprocessors. In addition, his Stride Prediction based Data Prefetch is the basis for nearly all data prefetch techniques used in most current microprocessors. Patel has supervised over 85 M.S. and Ph.D. theses and published over 200 technical papers.

During his academic stay at Illinois, Patel has had a major role in two start-ups. First was as founding technical advisor to Nexgen Microsystems, which gave rise to AMD’s present line of microprocessors. Second was as a co-founder of Sunrise Test Systems, which now is the basis for many test tools from Synopsys. In addition, Patel has provided technical consulting to a wide range of industries on architecture, reliability and testing.

He received a Bachelor of Science degree in Physics from Gujarat University, India and Bachelor of Technology in Electrical Engineering from the Indian Institute of Technology, Madras, India, and a Master of Science and Ph.D. in Electrical Engineering from Stanford University. He is a Fellow of ACM and IEEE, a recipient of the 1998 IEEE Piore Award and IEEE Test Technology Council Lifetime Achievement Award.

Academic Positions

  • Professor Emeritus ECE, U of I - January 2010 - Present

Research Interests

  • VLSI Testing and Testability, VLSI Design Automation

Research Areas

  • Computer aided design
  • Computer aided design of integrated circuits
  • Computer architecture
  • Digital integrated circuits
  • Hardware systems
  • Hardware verification and testing
  • Logic design and VLSI


  • IEEE Test Technology Council Lifetime Achievement Award, 2016
  • Fellow, ACM, 2001
  • IEEE Emanuel R. Piore Award, 1998
  • Best Paper Award, 1998 IEEE VLSI Test Symposium
  • Associate, Center for Advanced Study, 1992-93
  • Fellow, IEEE, 1989

Research Honors

  • Distinguished Lecture, Texas A&M Univ., College Station, TX, 2009
  • Distinguished Lecture, Georgia Tech, Atlanta, GA, 2009
  • Distinguished Lecture, North Western University, Evanston, IL, 2009
  • Keynote Speaker, IEEE International Test Conference, Austin, TX, 2006
  • Distinguished Lecture, Electrical and Computer Engineering, Purdue University, 2001
  • Nomination for Best Paper Award, ACM/IEEE Design Automation Conf. 1994
  • MCM Packaging Distinguished Lecture, Georgia Tech, Atlanta, GA, 1994
  • Inaugurated the Distinguished Lecture Series on Electronic Design Automation at IBM, Endicott, NY, 1993
  • Analog Devices Distinguished Lecture, Univ. of Michigan, Ann Arbor, 1992
  • Nomination for Best Paper Award, ACM/IEEE Design Automation Conf. 1987 (simulation and Test Category)
  • Keynote Speaker 1985 AT&T Technologies Conference on Electronic Testing, April 1985

Courses Taught

  • ECE 462 - Logic Synthesis