6/16/2026 Em Jankauski
Deming Chen's groundbreaking FPGA research earned induction into the ACM SIGDA TCFPGA Hall of Fame, highlighting advances in reconfigurable computing and design automation.
Written by Em Jankauski
Deming Chen certainly knows how to make a lasting impression. The Abel Bliss Professor of Engineering’s induction into the Association for Computing Machinery Special Interest Group on Design Automation (ACM/SIGDA)’s Technical Committee on Field-programmable Gate Array (TCFPGA) Hall of Fame is proof enough.
The TCFPGA Hall of Fame recognizes one academic paper per year that’s influential and widely recognized for its impact over the years. Chen’s 2004 paper, entitled DAOmap: A Depth-optimal Area Optimization Mapping Algorithm for FPGA Designs, stands the test of time.
The paper introduced a new algorithm, called DAOmap (depth-optimal area optimization mapping), which improved how digital logic is mapped onto field-programmable gate array (FPGA) hardware. The approach reduced the amount of chip area required while preserving performance, helping engineers create more efficient FPGA designs.
FPGAs are computer chips that can be reprogrammed after manufacturing, making them highly adaptable for a wide range of applications. They are used in communication systems, cloud computing, data centers, medical devices, automotive systems and increasingly in artificial intelligence technologies.
To take full advantage of FPGA hardware, engineers rely on software tools that translate designs into configurations the FPGA chips can execute efficiently.
“Think of the chip mapping like arranging furniture in a room,” Chen explained. “You want everything to fit, you want people to move through the room quickly, and you do not want to waste space.”
Chen’s new algorithm, known as DAOmap, addressed that challenge by helping engineers use FPGA resources more efficiently without sacrificing speed.
“Better FPGA design tools make these systems faster, more energy-efficient and more cost effective,” Chen said.
Chen’s findings essentially helped FPGA chip designs become smaller and more efficient without slowing them down.
The recognition is especially meaningful because of the Hall of Fame’s selectivity. Any FPGA-related paper published more than 10 years ago can be considered, but only one was chosen this year. The honor also highlights one of Chen’s earliest research contributions, completed while working with his doctoral adviser, University of California at Los Angeles professor Jason Cong.
“Seeing these ideas from the paper have remained relevant and have influenced modern FPGA synthesis tools more than two decades later is deeply rewarding,” Chen said.
According to Chen, the paper continues to resonate because it addresses a fundamental engineering challenge that remains important today: balancing performance, resource usage, and design efficiency.
“Even though FPGA technology has advanced dramatically, the underlying challenge of optimizing area, delay and logic duplication remains important,” Chen said.
An ACM fellow and active member of ACM SIGDA, Chen hopes the recognition further highlights Illinois’ leadership in computer engineering, design automation, reconfigurable computing and hardware-software co-design.
“It reinforces the importance of foundational research,” Chen said. “Sometimes an algorithmic idea developed many years ago continues to influence tools and systems for decades.”
He also hopes the honor inspires students and collaborators to pursue research that creates a lasting, practical impact.
Among his recent accomplishments is ScaleHLS, an open-source compiler framework that helps map PyTorch machine-learning models to customized FPGA accelerators. The project has been downloaded thousands of times by researchers around the world and aims to make hardware acceleration more accessible to AI researchers and system designers.
Chen is also proud of his work on Medusa, a speculative decoding technique designed to accelerate large language model inference. The technology was incorporated into NVIDIA’s TensorRT-LLM software, helping improve the speed and efficiency of AI applications.
“Both efforts aim to make AI and computing systems faster, more efficient and more accessible,” Chen said.
More broadly, Chen said, advances in hardware design and AI acceleration help support the computing infrastructure behind cloud services, health care technologies, scientific discovery and many other systems that shape everyday life.
Grainger Engineering Affiliations
Deming Chen is an Illinois Grainger Engineering professor in the Department of Electrical and Computer Engineering, Siebel School of Computing and Data Science, Coordinated Science Laboratory, and the Information Trust Institute. He is the Abel Bliss Professor of Engineering and the Illinois Director of IBM-Illinois Discovery Accelerator Institute. He is also the Director of the AMD Center of Excellence at the University of Illinois Urbana-Champaign.