Nam Sung Kim
Administrative Titles
For More Information
Education
- B.S., Electrical Engineering, Korea Advanced Institute of Science and Technology, 1997.
- M.S., Electrical Engineering, Korea Advanced Institute of Science and Technology, 2000.
- Ph.D., Computer Science and Engineering, University of Michigan, Ann Arbor, 2004.
Biography
I am the W.J. ‘Jerry’ Sanders III – Advanced Micro Devices, Inc. Endowed Chair Professor at the University of Illinois, Urbana-Champaign and a fellow of ACM, IEEE, and NAI. From 2018 to 2020, I took a leave of absence and as a Sr. Vice President at a major memory manufacturing company I led the development of next-generation DRAM products, including the industry's first HBM-PIM that will play a significant role in shaping the future computing landscape. Prior to joining the University of Illinois in the fall of 2015, I was an associate professor at the University of Wisconsin, Madison where I was early-tenured in 2013. My interdisciplinary research incorporates device, circuit, architecture, and software for power-efficient computing. Prior to joining the University of Wisconsin, Madison, I was a senior research scientist at Intel from 2004 to 2008, where I conducted research in power-efficient digital circuit and process architecture. I have published more than 250 refereed articles to highly-selective conferences and journals in the field of digital circuit, processor architecture, and computer-aided design. The top three most frequently cited papers have more than 5000 citations and the total number of citations of all my papers exceeds 15000. I was a recipient of the IEEE Design Automation Conference (DAC) Student Design Contest Award in 2001, Intel Fellowship in 2002, the IEEE International Symposium on Microarchitecture (MICRO) Best Paper Award in 2003, NSF CAREER Award in 2010, IBM Faculty Award in 2011 and 2012, the University of Wisconsin Villas Associates Award in 2015, ACM/IEEE Most Influential International Symposium on Computer Architecture (ISCA) Paper Award in 2017, and SIGMICRO 2021 Test of Time Awards in 2021. I am a hall of fame member of all three major computer architecture conferences, IEEE International Symposium on High-Performance Computer Architecture (HPCA) , MICRO, and ISCA. I earned a PhD degree in Computer Science and Engineering from the University of Michigan, Ann Arbor and Master and Bachelor degrees in Electrical Engineering from the Korea Advanced Institute of Science and Technology.
Academic Positions
- Assistant Professor, University of Wisconsin, Madison, Electrical and Computer Engineering, Aug 2008 -- July 2013.
- Associate Professor, University of Wisconsin, Madison, Electrical and Computer Engineering, Aug 2013-- Aug 2015.
- Associate Professor, University of Illinois, Urbana-Champaign, Electrical and Computer Engineering, Aug 2015 -- Aug 2018.
- Professor, University of Illinois, Urbana-Champaign, Electrical and Computer Engineering, Aug 2018 --
- W.J. ‘Jerry’ Sanders III – Advanced Micro Devices, Inc. Endowed Chair Professor, University of Illinois, Urbana-Champaign, Electrical and Computer Engineering, Aug 2021 --
Other Professional Employment
- Sr. Vice President, Samsung Electronics, Hawseong Korea, May 2018 -- Dec 2021.
- CPU Architect, Intel Corporation, Folsom CA, May 2007 -- Aug 2008.
- Sr. Research Scientist, Intel Corporation, Hillsboro OR, May 2004 -- Apr 2007.
Major Consulting Activities
- Samsung Electronics, Seoul, Korea.
Professional Registrations
- Fellow, National Academy of Inventors
- Fellow, Association for Computing Machinery
- Fellow, Institute of Electrical and Electronics Engineers
Research Interests
- High-performance, energy-efficent processor, memory, storage, network and system architectures
- Energy-efficient computing techniques for mobile/wearable devices and data centers
Research Areas
- Hardware systems
Research Topics
- Autonomous Systems and Artificial Intelligence
- Beyond CMOS
- Bioelectronics and Bioinformatics
- Cyberphysical systems and internet of things
- Data/Information Science and Systems
- Distributed computing and storage systems
- Electronics, Plasmonics, and Photonics
- Healthcare and medical technologies
- Point-of-care diagnostics
- Robotics
- Wearable and mobile computing
Chapters in Books
- Nam Sung Kim and Ulya R Karpuzcu. Approximate ultra-low voltage many-core processor design. Approximate Circuits, Springer, 2019.
- Zhenhong Liu and Nam Sung Kim. An ultra-low-power image signal processor for smart camera applications. CISS Research Series, Book 3: Smart Camera, Springer, 2015.
- Dongkeun Oh, Nam Sung Kim, Charlie Chung Ping Chen, and Yu Hen Hu. A mathematical method for VLSI thermal simulation at the system and circuit-levels. Recent Advancements in Modeling of Semiconductor Processes, Circuits and Chip-Level Interactions. Bentham Publishing (www.ebook-engineering.org), 2009.
- Nam Sung Kim, Todd Austin, Trevor Mudge, and D. Grunwald. Challenges for architectural level power modeling in power aware computing. Kluwer Academic Publishers: Boston, MA, 2001.
Selected Articles in Journals
- Hyungyo Kim, Gaohan Ye, Nachuan Wang, Amir Yazdanbakhsh, and Nam Sung Kim. Exploiting Intel® Advanced Matrix Extensions (AMX) for large language model inference. IEEE Computer Architecture Letters (CAL), January--June, 2024.
- Ipoom Jeong, Eunbi Jeong, Nam Sung Kim, and Myung Kuk Yoon. Triple-A: Early operand collector allocation for maximizing GPU register bank utilization. IEEE Embedded Systems Letters (ESL), June 2024.
- Seunghak Lee, Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, and Daehoon Kim. NoHammer: Preventing row hammer with last-level cache management. IEEE Computer Architecture Letters (CAL), July--December, 2023.
- Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, and Jung Ho Ahn. Unleashing the potential of PIM: Accelerating Transformer-based generative models with large batch sizes. IEEE Computer Architecture Letters (CAL), July-December 2023.
- Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, and Jung Ho Ahn. X-ray: Discovering DRAM internal structure and error characteristics by issuing memory commands. IEEE Computer Architecture Letters (CAL), IEEE Computer Architecture Letters (CAL), July-December 2023.
- Ipoom Jeong, Jiaqi Lou, Yongseok Son, Yongjoo Park, Yifan Yuan, and Nam Sung Kim. LADIO: Leakage-aware direct I/O for I/O-intensive workloads. IEEE Computer Architecture Letters (CAL), July-December 2023
- [Guest Editorial] John Kim and Nam Sung Kim. Special Issue on Emerging System Interconnects. IEEE Micro, May—June, 2023.
- Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor Mudge. Rethinking DRAM’s page mode with STT-MRAM. IEEE Transactions on Computers, May 2023.
- Ashutosh Dhar, Member, Edward Richter, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, and Deming Chen. DML: Dynamic partial reconfiguration with scalable task scheduling for multi-applications on FPGAs. IEEE Transactions on Computer, to appear.
- Jin Hyun Kim, Shin-haeng Kang, Sukhan Lee, Hyeonsu Kim, Yuhwan Ro, Seungwon Lee, David Wang, Jihyun Choi, Jinin So, Yeongon Cho, Joonho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim. Aquabolt-XL HBM2-PIM, LPDDR5-PIM with in-memory processing, and AXDIMM with acceleration buffer. IEEE Micro, May—June, 2022.
- Liu Ke, Xuan Zhang, Jinin So, Jong-Geon Lee, Shin-Haeng Kang, Sukhan Lee, Songyi Han, YeonGon Cho, Jin Hyun Kim, Yongsuk Kwon, KyungSoo Kim, Jin Jung, Ilkwon Yun, Sung Joo Park, Hyunsun Park, Joonho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim, Hsien-Hsin S. Lee. Near-memory processing in action: Accelerating personalized recommendation with AxDIMM. IEEE Micro, January—February, 2022.
- Bingchao Li, Jizeng Wei, Nam Sung Kim. Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures. Microprocessors and Microsystems, September, 2021.
- [IEEE Micro Top Picks] Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, and Josep Torrellas. BabelFish: Fusing address translations for containers. IEEE Micro, 41(3), 2021.
- Zhengdong Bei, Nam Sung Kim, Kai Hwang, and Zhibin Yu, OSC: An online self-configuring big data framework for optimization of QoS. IEEE Transactions on Computers (TC), to appear.
- Mohammad Alian, Jongmin Shin, Ki-Dong Kang, Ren Wang, Alexandros Daglis, Daehoon Kim, and Nam Sung Kim. IDIO: Orchestrating inbound network data on server processors. IEEE Computer Architecture Letters (CAL), 20(1), 2021.
- Chang-Kyo Lee, Hyung-Joon Chi, Jin-Seok Heo, Jung-Hwan Park, Jin-Hun Jang, Dongkeon Lee, Jae-Hoon Jung, Dong-Hun Lee, Dae-Hyun Kim, Kihan Kim, Sang-Yun Kim, Dukha Park, Youngil Lim, Geuntae Park, Seung-Jun Lee, Seungki Hong, Dae-Hyun Kwon, Isak Hwang, Byongwook Na, Kyung-Ryun Kim, Seouk-Kyu Choi, Hyein Choi, Won-Il Bae, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, and Jung-Bae Lee. An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM with a hybrid-bank architecture, low power, and speed-boosting techniques. IEEE Journal of Solid-State Circuits (JSSC), 56(1), January 2021.
- Ki Chul Chun, Yong Ki Kim, Yesin Ryu, Jaewon Park, Chi Sung Oh, Young Yong Byun, So Young Kim, Dong Hak Shin, Jun Gyu Lee, Byung-Kyu Ho, Min-Sang Park, Seong-Jin Cho, Seunghan Woo, Byoung Mo Moon, Beomyong Kil, Sungoh Ahn, Jae Hoon Lee, Soo Young Kim, Seouk-Kyu Choi, Jae-Seung Jeong, Sung-Gi Ahn, Jihye Kim, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, and Jung-Bae Lee. A 16-GB 640-GB/s HBM2E DRAM With a data-bus window extension technique and a synergetic on-die ECC scheme. IEEE Journal of Solid-State Circuits (JSSC), 56(1), January 2021.
- Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam Sung Kim, Mahmut Kandemir, and Myoungsoo Jung. FastDrain: Removing page victimization overheads in NVMe storage stack. IEEE Computer Architecture Letters (CAL), 19(2), July-December 2020.
- Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, and Daehoon Kim. Network packet processing mode-aware power management for data center servers. IEEE Computer Architecture Letters (CAL), 19(1), January-June 2020.
- Yongseok Son, Moonsub Kim, Sunggon Kim, Heon Y Yeom, Nam Sung Kim, and Hyuck Han. Design and implementation of SSD-assisted backup and recovery for database systems. IEEE Transactions on Knowledge and Data Engineering (TKDE), 32(2), February 2020.
- Mingu Kang, Prakalp Srivastava, Vikram Adve, Nam Sung Kim, and Naresh R Shanbhag. An energy-efficient programmable mixed-signal accelerator for machine learning algorithms. IEEE Micro, 39(5), September-October 2019.
- Seunghak Lee, Nam Sung Kim, and Daehoon Kim. Exploiting OS-level memory offlining for DRAM power management. IEEE Computer Architecture Letters (CAL), 18(2), July-December 2019.
- Bingchao Li, Jizeng Wei, Jizhou Sun, Murali Annavaram and Nam Sung Kim. An efficient GPU cache architecture for applications with irregular memory access patterns. ACM Transactions on Architecture and Code Optimization (TACO), to 16(3), June 2019.
- Sungjoon Koh, Jie Zhang, Miryeong Kwon, Yoon Jungyeon, David Donofrio, Nam Sung Kim, and Myoungsoo Jung. Exploring fault-tolerant erasure codes for scalable all-flash array clusters. IEEE Transactions on Parallel and Distributed Systems (TPDS), 30(6), June 2019.
- Zhenhong Liu, Amir Yazdanbakhsh, Taejoon Park, Hadi Esmaeilzadeh, and Nam Sung Kim. SiMul: An algorithm-driven approximate multiplier design for machine learning. IEEE Micro, 38(4), July-August 2018.
- Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, and Jung Ho Ahn. Leveraging power-performance relationship of energy-efficient modern DRAM devices. IEEE Access 2018.
- Myoungsoo Jung, Jie Zhang, Ahmed Abulila, Miryeong Kwon, Narges Shahidi, John Shalf, Nam Sung Kim and Mahmut Kandemir. SimpleSSD: Modeling solid state drive for holistic system simulation. IEEE Computer Architecture Letter (CAL), 17(1), January-June 2018.
- DaeHan Ahn, Hyerim Chung, Ho-Won Lee, Kyunghun Kang, Pan-Woo Ko , Nam Sung Kim, and Taejoon Park. Smart gait-aid glasses for Parkinson's disease patients. IEEE Transactions on Biomedical Engineering (TBME), 64(10), October 2017.
- Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, and Xiaoyao Liang. CNFET-based high throughput SIMD architecture. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 37(7), July 2017.
- Nam Sung Kim, Deming Chen, Jinjun Xiong, and Wen-mei Hwu. Heterogeneous computing meets near-memory acceleration and high-level synthesis in the post-moore era. IEEE Micro, 37(4) July-August 2017.
- Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, and Nam Sung Kim. Exploring new features of high-bandwidth memory for GPUs. IEICE Electronics Express, 13(14), June 2016.
- Jae Young Jang, Hao Wang, Euijin Kwon, Jae W. Lee, and Nam Sung Kim. Workload-aware optimal power allocation on single-chip heterogeneous processors. IEEE Transactions on Parallel and Distributed Systems, 27(6), June 2016.
- Jongwan Yoon, Andrew Park, Nam Sung Kim, and Taejoon Park. Cost-effective, asynchronous inter-sensor distance estimation using trigonometry. IET Electronic Letters, 52(12), June 2016.
- Hadi Asgharimoghaddam and Nam Sung Kim. SpinWise: A practical energy-efficient synchronization technique for CMPs. ACM SIGARCH Computer Architecture News, 44(1), May 2016.
- Qiaang Xu, Todd Mytkowicz, and Nam Sung Kim. Approximate computing: A survey. IEEE Design & Test, 33(1), February 2016.
- Mohammad Alian, Daehoon Kim, and Nam Sung Kim. pd-gem5: Simulation infrastructure for parallel/distributed computer systems. IEEE Computer Architecture Letters (CAL), 15(1), January-June 2016.
- Hadi Asgharimoghaddam, Amin Farmahini-Farahani, Katherine Morrow, Jung Ho Ahn, and Nam Sung Kim. Near-DRAM acceleration with single-ISA heterogeneous processing in standard memory modules. IEEE Micro, 36(1), January-February 2016.
- Zhenhong Liu, Taejoon Park, Hyun Sang Park, and Nam Sung Kim. An ultra-low-power image signal processor for smart camera applications. IET Electronic Letters, 51(22), October 2015.
- Heesung Lim, Taejoon Park, and Nam Sung Kim. Joint optimization of computational accuracy and algorithm parameters for energy-efficient recognition algorithms. IET Electronic Letters, 51(16), August 2015.
- Ismail Akturk, Ulya Karpuzcu, and Nam Sung Kim. Decoupling control and data processing for approximate near-threshold voltage computing. IEEE Micro, 35(4), July 2015.
- Srinivasan Narayanamoorthy, Hadi Asghari Moghaddam, Zhenhong Liu, Taejoon Park, and Nam Sung Kim. Energy-efficient approximate multiplication for digital signal processing and classification applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 23(6), June 2015.
- Amin Farmahini-Farahani, Jung Ho Ahn, Katherine Morrow, and Nam Sung Kim. DRAMA: An architecture for accelerated processing near DRAM. IEEE Computer Architecture Letters (CAL), 14(1), January-June 2015.
- Syed Gilani, Taejoon Park, and Nam Sung Kim. Low-cost scratchpad memory organizations using heterogeneous cell sizes for low-voltage operations. Microprocessors and Microsystems, 38(7), October 2014.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Energy-efficient pixel arithmetic. IEEE Transactions on Computers, 63(8), August 2014.
- Dae Han Ahn, Nam Sung Kim, Sang June Moon, Taejoon Park, and Sang Hyuk Son. Optimization of a cell counting algorithm for mobile point-of-care testing platforms. Sensors, 14(8), August 2014.
- Nam Sung Kim, Taejoon Park, Srinivasan Narayanamoorthy, and Hadi Moghaddam. Multiplier supporting accuracy and energy trade-offs for recognition applications. IET Electronics Letters, 50(7), March, 2014.
- Hao Wang and Nam Sung Kim. Improving throughput of many-core processors based on unreliable emerging devices under power constraint. IEEE Micro, 33(4), July/August, 2013.
- David Palframan, Nam Sung Kim, and Mikko Lipasti. Resilient high-performance processors with spare RIBs. IEEE Micro, 33(4), July/August, 2013.
- Ulya Karpuzcu, Nam Sung Kim, and Josep Torrellas. Coping with the higher susceptibility to parametric variation at near-threshold voltages. IEEE Micro, 33(4), July/August, 2013.
- Alaa R. Alameldeen, Nam Sung Kim, Samira M. Khan, Hamid Reza Ghasemi, Chris Wilkerson, Jaydeep Kulkarni, and Daniel A. Jiménez. Improving memory reliability, power and performance using mixed-cell designs. Intel Technology Journal, 17(1), May 2013.
- Abhishek Sinkar, Hamid Reza Ghasemi, Ulya Karpuzcu, Michael Schulte, and Nam Sung Kim. Low-cost per-core voltage domain support for power-constrained high-performance processors. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 22(4), April 2013.
- Abhishek Sinkar Taejoon Park, Nam Sung Kim. Clamping virtual supply voltage of power-gated circuits for active leakage reduction and gate-oxide reliability improvement. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 21(3), March 2013.
- Nam Sung Kim, Stark Draper, Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, and Taejoon Park. Analyzing the impact of joint optimization of cell size, redundancy, and ECC on low-voltage SRAM array total area. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(12), December 2012.
- Nam Sung Kim, Abhishek Sinkar, June Seomun# and Youngsoo Shin. Maximizing frequency and yield of power-constrained designs using programmable power-gating. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 20(10), October 2012.
- Jungseob Lee and Nam Sung Kim. Analyzing potential throughput improvement of power- and thermal-constrained multicore processors by exploiting DVFS and PCPG. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 20(2), February 2012.
- Muhammad Khellah, Nam Sung Kim, Yibin Ye, Dinesh Somasekhar, Tanay Karnik, Nitin Borkar, Gunjan Pandya, Fatih Hamzaoglu, Tom Coan, Yih Wang, Kevin Zhang, Clair Webb, and Vivek De. Process, temperature, and supply-noise tolerant 45nm dense cache arrays with diffusion-notch-free (DNF) 6T SRAM cells and dynamic Multi-Vcc circuits. IEEE Journal of Solid State Circuits (JSSC), 44(4), April 2009.
- Keith Bowman, James Tschanz, Nam Sung Kim, Janice Lee, Chris Wilkerson, Shih-Lien L. Lu, Tanay Karnik, and Vivek De. Energy-efficient and metastability-immune resilient circuits for dynamic variation tolerance. IEEE Journal of Solid State Circuits (JSSC), 44(1), January 2009.
- DiaaEldin Khalil, Muhammad Khellah, Nam Sung Kim, Yehea Ismail, Tanay Karnik and Vivek De. SRAM dynamic stability estimation using MPFP and its applications. Microelectronics Journal, 40(11), November 2009.
- DiaaEldin Khalil, Muhammad Khellah, Nam Sung Kim, Yehea Ismail, Tanay Karnik, and Vivek De. Accurate estimation of SRAM dynamic stability. IEEE Transactions on Very Large Integration (VLSI) Systems (TVLSI), 16(12), December 2008.
- David Roberts, Nam Sung Kim and Trevor Mudge. On-chip cache device scaling limits and effective fault repair techniques in future nanoscale technology. Microprocessors and Microsystems, 32(5-6), August 2008.
- Muhammad Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, Gunjan Pandya, Ali Farhang, Kevin Zhang, and Vivek De. A 256-Kb dual-VCC SRAM building block in 65-nm CMOS process with actively clamped sleep transistor. IEEE Journal of Solid State Circuits (JSSC), 42(1), January 2007.
- Nam Sung Kim, David Blaauw, and Trevor Mudge. Quantitative analysis and optimization techniques for on-chip cache leakage power. IEEE Transactions on Very Large Integration (VLSI) Systems (TVLSI), 13(10), October 2005.
- Dan Ernst, Shidhartha Das, Seokwoo Lee, David Blaauw, Todd Austin, Trevor Mudge, Nam Sung Kim, Krisztián Flautner. Razor: Circuit-level correction of timing errors for low-power operation. IEEE Micro, 24(6), December 2004.
- Nam Sung Kim, Krisztián Flautner, David Blaauw, and Trevor Mudge. Circuit and microarchitectural techniques for reducing cache leakage power. IEEE Transactions on Very Large Integration (VLSI) Systems (TVLSI), 12(2), February 2004.
- Nam Sung Kim, Todd Austin, David Blaauw, Trevor Mudge, Kriszitan Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut Kandemir, and Vijaykrishnan Narayanan, Leakage current — Moore’s Law meets static power. IEEE Computer, 36(12), December 2003.
Articles in Conference Proceedings
- Eunbi Jeong, Ipoom Jeong, Myung Kuk Yoon, Nam Sung Kim. Warped-compaction: Maximizing GPU register file Bandwidth utilization via operand compaction. IEEE International Symposium on High-Performance Computer Architecture (HPCA), March 2025.
- Seungmin Baek, Minbok Wi, Seonyong Park, Hwayong Nam, Michael Jaemin Kim, Nam Sung Kim, Jung Ho Ahn. Marionette: A RowHammer attack via row coupling. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) April, 2025.
- Yan Sun, Jongyul Kim, Douglas Yu, Jiyuan Zhang, Siyuan Chai, Michael Jaemin Kim, Hwayong Nam, Jaehyun Park, Eojin Na, Yifan Yuan, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim. M5: Mastering page migration and memory management for CXL-based tiered memory systems. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) April, 2025.
- Zhiting Zhu, Newton Ni, Yibo Huang, Yan Sun, Zhipeng Jia, Nam Sung Kim, Emmett Witchel. Lupin: Tolerating partial failures in a CXL Pod. Workshop on Disruptive Memory Systems, November 2024.
- Houxiang Ji, Srikar Vanavasam, Yang Zhou, Qirong Xia, Jinghan Huang, Yifan Yuan, Ren Wang, Pekon Gupta, Bhushan Chitlur, Ipoom Jeong, and Nam Sung Kim. Demystifying a CXL Type-2 device: A heterogeneous cooperative computing perspective. IEEE/ACM International Symposium on Microarchitecture (MICRO), November 2024.
- Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas. Defensive ML: Adversarial machine learning as a practical architectural defense for side channels. ACM International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2024.
- Ram Krishna, Ashita Victor, Srujan Penta, Xu Chen, Muhannad Bakir, Nam Sung Kim, Elyse Rosenbaum. Yield-aware interposer design for UCIe interconnects. IEEE Conference on Electrical Performance of Electronics Packaging and Systems (EPEPS), October 2024.
- Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Sanjay Kumar, Philip Lantz, Vivekananthan Sanjeepan, Jorge Cabrera, Atul Kwatra, Rajesh Sankaran, Ipoom Jeong, Nam Sung Kim. Intel accelerator ecosystem: An SoC-oriented perspective. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2024.
- Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn. DRAMScope: Uncovering DRAM microarchitecture and characteristics by issuing memory commands. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2024.
- Jinghan Huang, Jiaqi Lou, Srikar Vanavasam, Xinhao Kong, Houxiang Ji, Ipoom Jeong, Eun Kyung Lee, Danyang Zhuo, Nam Sung Kim. HAL: Hardware-assisted load balancing for energy-efficient SNIC-host cooperative computing. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2024.
- Jiaqi Lou, Xinhao Kong, Jinghan Huang, Wei Bai, Nam Sung Kim, Danyang Zhuo. Harmonic: Hardware-assisted RDMA performance isolation for public clouds. USENIX Symposium on Networked Systems Design and Implementation (NSDI), April, 2024.
- Chihun Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim. TAROT: A CXL SmartNIC-based defense against multi-bit errors by row hammer attacks. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April, 2024.
- Soroush Ghodrati, Sean Kinzer, Hanyang Xu, Rohan Mahapatra, Yoonsung, Byung Hoon Ahn, Dong Kai Wang, Lavanya Karthikeyan, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Hadi Esmaeilzadeh. Tandem processor: grappling with emerging operators in neural networks. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) April, 2024.
- Jaehyun Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung Kim, Jung Ho Ahn. AttAcc! Unleashing the power of PIM for batched Transformer-based generative model inference. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) April, 2024.
- Reese Kuper, Ipoom Jeong, Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Jiayu Hu, Sanjay Kumar, Philip Lantz, Nam Sung Kim. A quantitative analysis and guidelines of data streaming accelerator in Intel 4th -generation Xeon scalable processors. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) April, 2024.
- Minjae Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Junwon Choi, Nam Sung Kim, Mingu Kang, Jungwook Choi. SPADE: Sparse pillar-based 3D object detection accelerator for autonomous driving. IEEE International Symposium on High-Performance Computer Architecture (HPCA), March 2024.
- Sang-Soo Park, KyungSoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee, YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, and Nam Sung Kim. An LPDDR-based CXL-PNM platform for TCO-efficient inference of Transformer-based large language models -- Industry Product. IEEE International Symposium on High-Performance Computer Architecture (HPCA), March 2024.
- Pham Tuan Kiet, Seokjoo Cho, Sang Jin Lee, Lan Anh Nguyen, Hyeongi Yeo, Ipoom Jeong, Sungjin Lee, Nam Sung Kim, and Yongseok Son. ScaleCache: A scalable page cache for multiple solid-state drives. ACM Eurosys, April 2024.
- [Best Paper Runner-up Award] Jinghan Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim. Making sense of using a SmartNIC to reduce datacenter tax from SLO and TCO perspectives. IEEE International Symposium on Workload Characterization (IISWC), October 2023.
- Michael Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jae Young Choi, Hwayoung Nam, Nam Sung Kim, Jung Ho Ahn, and Eojin Lee. How to kill the second bird with one ECC: The Pursuit of row hammer resilient DRAM. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2023.
- Yan Sun, Yifan Yuan, Zeduo Yu, Chihun Song, Reese Kuper, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim. Demystifying CXL memory with genuine CXL-ready systems and devices. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2023.
- Houxiang Ji, Yan Sun, Mark Mansi, Yifan Yuan, Jinghan Huang, Reese Kuper, Michael Swift, Nam Sung Kim. STYX: Exploiting SmartNIC capability to reduce datacenter memory tax. USENIX Annual Technical Conference (ATC), July 2023.
- Krisztian Flautner, Nam Sung Kim, Steve Martin, David Blaauw, and Trevor Mudge. RETROSPECTIVE: Drowsy Caches: Simple Techniques for Reducing Leakage Energy. ISCA@50 Retrospective: 1996-2020, June 2023.
- Xinhao Kong, Jiaqi Lou, Wei Bai, Nan Sung Kim, Danyang Zhuo. Towards a manageable intra-host network. Workshop on Hot Topics in Operating Systems (HotOS), June 2023.
- Dong Kai Wang, Jiaqi Lou, Naiyin Jin, Edwin Mascarenhas, Rohan Mahapatra, Sean Kinzer, Soroush Ghodrati, Amir Yazdanbakhsh, Hadi Esmaeilzadeh, Nam Sung Kim. MESA: Microarchitecture extensions for spatial architecture generation. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2023.
- Jinghan Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim. Analyzing energy efficiency of a server with a SmartNIC under SLO constraints. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2023.
- Minbok Wi, Jaehyun Park, Seoyoung Ko, Michael Jaemin Kim, Eojin Lee, Nam Sung Kim, and Jung Ho Ahn. SHADOW: Preventing row hammer in DRAM with intra-subarray row shuffling. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2023.
- Yifan Yuan, Jinghan Huang, Yan Sun, Tianchen Wang, Jacob Nelson, Dan Ports, Yipeng Wang, Ren Wang, Charlie Tai, and Nam Sung Kim. RAMBDA: RDMA-driven acceleration framework for memory-intensive us-scale datacenter applications. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2023.
- Mohammad Alian, Siddharth Agarwal, Jongmin Shin, Neel Patel, Yifan Yuan, Daehoon Kim, Ren Wang, Nam Sung Kim. IDIO: Network-driven, inbound network data orchestration on server processors. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2022.
- Youjie Li, Amar Phanishayee, Derek Murray, Jakub Tamawski, Nam Sung Kim. Harmony: Overcoming the hurdles of GPU memory capacity to train massive DNN models on commodity servers. International Conference on Very Large Databases (VLDB), September 2022.
- Cheng Wan, Youjie Li, Ang Li, Nam Sung Kim, Yingyan Lin. BNS-GCN: Efficient Full-Graph Training of Graph Convolutional Networks with Partition-Parallelism and Random Boundary Node Sampling Sampling. Machine Learning and Systems (MLSys), August, 2022.
- Ahmed Abulila, Izzat El Hajj, Myoungsoo Jung, Nam Sung Kim. ASAP: Architecture support for asynchronous Persistence. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2022.
- Cheng Wan, Youjie Li, Cameron R. Wolfe, Anastasios Kyrillidis, Nam Sung Kim, Yingyan Lin. PipeGCN: Efficient full-graph training of graph convolutional networks with pipelined feature communication. International Conference on Learning Representations (ICLR), April 2022.
- Yifan Yuan, Omar Alama, Jiawei Fei, Jacob Nelson, Dan R. K. Ports, Amedeo Sapio, Marco Canini, Nam Sung Kim. Unlocking the Power of Inline Floating-Point Operations on Programmable Switches. USENIX Symposium on Networked Systems Design and Implementation (NSDI), April, 2022.
- Shinhaeng Kang, Sukhan Lee, Byeongho Kim, Eojin Lee, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim. An FPGA-based RNN-T Inference Accelerator with PIM-HBM. ACM International Symposium on Field-Programmable Gate Arrays (FPGA), February, 2022.
- Ki-Dong Kang, Gyeongseo Park, Hyosang Kim, Mohammad Alian, Nam Sung Kim, and Daehoon Kim. NMAP: power management based on network packet processing mode transition for latency-critical workloads. IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2021.
- Seunghak Lee, Ki-Dong Kang, Hwanjun Lee, Hyungwon Park, Younghoon Son, Nam Sung Kim, Daehoon Kim. GreenDIMM: OS-assisted DRAM power management for DRAM with a sub-array granularity power-down state. IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2021.
- Youjie Li, Amar Phanishayee, Derek Murray, and Nam Sung Kim. Doing more with less: Training large DNN models on commodity servers for the masses. ACM SIGOPS HotOS XVIII, May 2021. Acceptance rate 26%.
- [IEEE Micro Top Picks Honorable Mention] Sukhan Lee, Shin-haeng Kang, Jaehoon Lee, Hyeonsu Kim, Eojin Lee, Seungwoo Seo, Hosang Yoon, Seungwon Lee, Kyounghwan Lim, Hyunsung Shin, Jinhyun Kim, Seongil O, Anand Iyer, David Wang, Kyomin Sohn, and Nam Sung Kim. Hardware Architecture and Software Stack for FIM Based on Commercial DRAM Technology. IEEE/ACM International Symposium on Computer Architecture (ISCA), May 2021. A full journal length paper w/ acceptance rate below 20%.
- Yifan Yuan, Mohammad Alian, Yipeng Wang, Ren Wang, Ilia Kurakin, Charlie Tai, and Nam Sung Kim. Don't Forget the I/O When Allocating Your LLC. IEEE/ACM International Symposium on Computer Architecture (ISCA), May 2021. A full journal length paper w/ acceptance rate below 20%
- Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Nam Sung Kim, Mahmut Taylan Kandemir, Myoungsoo Jung. Revamping storage class memory with hardware automated memory-over-storage solution. IEEE/ACM International Symposium on Computer Architecture (ISCA), May 2021. A full journal length paper w/ acceptance rate below 20%
- Dong Kai Wang and Nam Sung Kim. DiAG: A dataflow-inspired architecture for general-purpose processors. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April, 2021. A full journal length paper w/ acceptance rate below 20%
- Yifan Yuan, Yipeng Wang, Ren Wang, Rangeen Basu Roy Chowdhury, Charlie Tai, and Nam Sung Kim. QEI: Query acceleration can be generic and efficient in the cloud. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2021. A full journal length paper w/ acceptance rate below 20%
- [Word’s First HBM-Based Function-In-Memory Chip] Young-Cheon Kwon , Suk Han Lee , Jaehoon Lee , Sang-Hyuk Kwon , Je Min Ryu , Jong-Pil Son , Seongil O , Hak-Soo Yu , Haesuk Lee , Soo Young Kim , Youngmin Cho , Jin Guk Kim , Jongyoon Choi , Hyun-Sung Shin , Jin Kim , BengSeng Phuah , HyoungMin Kim , Myeong Jun Song , Ahn Choi , Daeho Kim , SooYoung Kim , Eun-Bong Kim , David Wang , Shinhaeng Kang , Yuhwan Ro , Seungwoo Seo , JoonHo Song , Jaeyoun Youn , Kyomin Sohn and Nam Sung Kim. A 20nm 6GB function-in-memory DRAM based on HBM2 with a 1.2TFLOPS programmable computing unit using bank-level parallelism for machine learning applications. IEEE International Solid-State Circuit Conference (ISSCC), February 2021.
- Young-Hun Kim, Hyung-Jin Kim, Jaemin Choi, Min-Su Ahn, Dongkeon Lee, Seung-Hyun Cho, Dong-Yeon Park, Young-Jae Park, Min-Soo Jang, Yong-Jun Kim, Jinyong Choi, Sung-Woo Yoon, Jae-Woo Jung, Jae-Koo Park, Jae-Woo Lee, Dae-Hyun Kwon, Hyung-Seok Cha, Si-Hyeong Cho, Seong-Hoon Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim, Yung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seoug-Kyu Choi, Chan-Young Kim, Byung-Wook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, and Jung-Bae Lee. A 16Gb sub-1V 7.14Gb/s/pin LPDDR5 SDRAM applying a mosaic architecture with a short-feedback 1-tap DFE, an FSS bus with low-level swing and an adaptively controlled body biasing in a 3rd-Generation 10nm DRAM. IEEE International Solid-State Circuit Conference (ISSCC), February 2021.
- Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Doug Burger, and Hadi Esmaeilzadeh. Mixed-signal charge-domain acceleration of deep neural networks through interleaved bit-partitioned arithmetic. ACM International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2020. A full journal length paper w/ acceptance rate below 20%.
- Ashutosh Dhar, Xiaohao Wang, Hubertus Franke, Jinjun Xiong, Jian Huang, Wen-mei Hwu, Nam Sung Kim, and Deming Chen. FReaC Cache: Folded-logic reconfigurable computing in the last level cache. IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2020. A full journal length paper w/ acceptance rate below 20%.
- Soroush Ghodrati, Byung Hoon Ahn, Joon Kyung Kim, Sean Kinzer, Brahmendra Reddy Yatham, Navateja Alla, Hardik Sharma, Mohammad Alian, Eiman Ebrahimi, Nam Sung Kim, Cliff Young, and Hadi Esmaeilzadeh. Planaria: Dynamic architecture fission for spatial multi-tenant acceleration of deep neural networks. IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2020. A full journal length paper w/ acceptance rate below 20%.
- Mohammad Alian, Yifan Yuan, Jie Zhang, Ren Wang, Myoungsoo Jung, and Nam Sung Kim. Data direct I/O characterization for future I/O system exploration. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), August 2020. A full journal length paper.
- Soroush Ghodrati, Hardik Sharma; Cliff Young, Nam Sung Kim and Hadi Esmaeilzadeh. Bit-parallel vector composability for neural acceleration. IEEE/ACM Design Automation Conference (DAC), July 2020.
- [IEEE Micro Top Picks] Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, and Josep Torrellas. BabelFish: Fusing address translations for containers. IEEE/ACM International Symposium on Computer Architecture (ISCA), May 2020. A full journal length paper w/ acceptance rate below 20%.
- Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sanguhn Cha, Donghak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yongsik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, Seungseob Lee, Sooyoung Kim, Botak Lim, Seouk-Kyu Choi, Jin-Guk Kim, Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, and Jung-Bae Lee. A 1.1 V 16GB 640GB/s HBM2E DRAM with a data-Bus window-extension technique and a synergetic on-die ECC scheme. IEEE International Solid-State Circuits Conference (ISSCC), February 2020.
- [Best Paper Award] Ashutosh Dhar, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, and Deming Chen. Leveraging dynamic partial reconfiguration with scalable ILP based task scheduling. International Conference on VLSI Design and International Conference on Embedded Systems (VLSID), January 2020.
- Mohammad Alian and Nam Sung Kim. Netdimm: Low-latency near-memory network interface architecture. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2019.
- Hyojun Son, Hanjoon Kim, Hao Wang, Nam Sung Kim, and John Kim. Ghost routers: Energy-efficient asymmetric multicore processors with symmetric NoCs. IEEE/ACM International Symposium on Networks-on-Chip (NOC), October 2019.
- Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G Dreslinski, and Trevor Mudge. SMART: STT-MRAM architecture for smart activation and sensing. IEEE/ACM International Symposium on Memory Systems (MEMSYS), September 2019.
- Ashutosh Dhar, Sitao Huang, Jinjun Xiong, Damir Jamsek, Bruno Mesnet, Jian Huang, Nam Sung Kim, Wen-mei Hwu, and Deming Chen. Near-memory and in-storage FPGA acceleration for emerging cognitive computing workloads. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2019.
- Dong Kai Wang and Nam Sung Kim. A2M: Approximate algebraic memory using polynomials rings. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), July 2019.
- Zhenhong Liu, Amir Yazdanbakhsh, Dong Kai Wang, Hadi Esmaeilzadeh and Nam Sung Kim. AxMemo: hardware-compiler co-design for approximate code memoization. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2019.
- [Invited] Nam Sung Kim and Pankaj Mehra. Practical Near-data processing to evolve memory and storage devices into mainstream heterogeneous computing systems. IEEE/ACM Design Automation Conference (DAC), June 2019.
- Nam Sung Kim, Choungki Song, Woo Young Cho, Jian Huang, and Myoungsoo Jung. LL-PCM: Low-latency phase change memory architecture. IEEE/ACM Design Automation Conference (DAC), June 2019.
- Ahmed Abulila, Vikram Sharma Mailthody, Zaid Qureshi, Jian Huang, Nam Sung Kim, Jinjun Xiong, Wen-mei Hwu. FlatFlash: Exploiting the byte-accessibility of SSDs within a unified memory-storage hierarchy. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April, 2019.
- Youjie Li, Mingchao Yu, Songze Li, Salman Avestimehr, Nam Sung Kim, and Alexander Schwing. Pipe-SGD: A decentralized pipelined SGD framework for distributed deep net training. Advances in Neural Information Processing Systems (NeurIPS), December 2018.
- Mingchao Yu, Zhifeng Lin, Krishna Narra, Songze Li, Youjie Li, Nam Sung Kim, Alexander Schwing, Murali Annavaram, and Salman Avestimehr. GradiVeQ: Vector quantization for bandwidth-efficient gradient aggregation in distributed CNN training. Advances in Neural Information Processing Systems (NeurIPS), December 2018.
- [Invited] Nam Sung Kim. Practical challenges in supporting function in memory. IEEE Asian Solid-State Circuits Conference (A-SSCC), November 2018.
- Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn, Bingchao Li, Ronald G Dreslinski, and Trevor Mudge. A load balancing technique for memory channels. IEEE/ACM International Symposium on Memory Systems (MEMSYS), October 2018.
- [Best Paper Award Nomination -- Top 1.1% of all the submissions] Mohammad Alian, Seung Won Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam McPadden, Oliver OHalloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-mei Hwu, and Nam Sung Kim. Application-transparent near-memory processing architecture with memory channel network. IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2018.
- Youjie Li, Jongse Park, Mohammad Alian, Yifan Yuan, Qu Zheng, Petian Pan, Ren Wang, Alexander Gerhard Schwing, Hadi Esmaeilzadeh, and Nam Sung Kim. A network-centric hardware/algorithm co-design to accelerate distributed training of deep neural networks. IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2018.
- Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut Kandemir, and Myoungsoo Jung. Amber: Enabling precise full-system simulation with detailed modeling of all SSD resources. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2018.
- Jie Zhang, Miryeong Kwon, Donghyun Gouk, Changlim Lee, Mohammad Alian, Myoungjun Chun, Mahmut Kandemir, Nam Sung Kim, Jihong Kim, and Myoungsoo Jung. FlashShare: Punching through server storage stack from kernel to firmware for ultra-low latency SSDs. USENIX Symposium on Operating Systems Design and Implementation (OSDI), October, 2018.
- Ki-dong Kang, Mohammand Alian, Daehoon Kim, Jaehyuk Huh, and Nam Sung Kim. VIP: Virtual performance-state for efficient power management of virtual machines. ACM Symposium on Cloud Computing (SoCC), October 2018.
- [Best Paper Award Nomination] Mohammad Alian, Krishna Parasuram Srinivasan, and Nam Sung Kim. Simulating PCI-Express interconnect for future system exploration. IEEE International Symposium on Workload Characterization (IISWC), September 2018.
- Amir Yazdanbakhsh, Choungki Song, Jacob Sacks, Pejman Lotfi-Kamran, Nam Sung Kim, Hadi Esmaeilzadeh. In-DRAM near-data approximate acceleration for GPUs. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), October 2018.
- Sukhan Lee, Kiwon Lee, Minchul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, and Nam Sung Kim. 3D-XPath: High-density managed DRAM architecture with cost-effective alternative paths for memory transactions. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), October 2018.
- Zhenhong Liu, Daniel Wong, and Nam Sung Kim. Load-triggered warp approximation on GPU. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2018.
- Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn, Bingchao Li, Ronald Dreslinski and Trevor Mudge. Improving load balancing for HBM channels. International Symposium on Memory Systems (MEMSYS), October 2018.
- [IEEE Micro Top Picks Honorable Mention] Prakalp Srivastava, Mingu Kang, Sujan Kumar Gonugondla, Sungmin Lim, Jungwook Choi, Nam Sung Kim, Vikram Adve, and Naresh Shanbhag. PROMISE: An end-to-end design of a programmable mixed-signal accelerator for machine learning algorithms. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2018.
- Amir Yazdanbakhsh, Hajar Falahati, Philip J. Wolfe, Kambiz Samadi, Hadi Esmaeilzadeh, and Nam Sung Kim. GANAX: A unified SIMD-MIMD acceleration for generative adversarial network. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2018.
- Gunjae Koo, Hyeran Jeon, Zhenhong Liu, Nam Sung Kim, and Murali Annavaram. CTA-aware prefetching and scheduling for GPU. IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2018.
- Jie Zhang, Shuwen Gao, Nam Sung Kim and Myoungsoo Jung. CIAO: Cache interference-aware throughput-oriented architecture and scheduling. IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2018.
- Amir Yazdanbakhsh, Michael Brzozowski, Behnam Khaleghi, Soroush Ghodrati, Kambiz Samadi, Nam Sung Kim, and Hadi Esmaeilzadeh. Flexigan: An end-to-end solution for FPGA acceleration of generative adversarial networks. IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2018.
- Xiaofan Zhang, Mohamed El Hadedy, Wen-mei Hwu, Nam Sung Kim, Jinjun Xiong, and Deming Chen. Implementing long-term recurrent convolutional network using HLS on POWER system. OpenPOWER US Summit, March 2018.
- [Extended Abstract] Amir Yazdanbakhsh, Kambiz Samadi, Hadi Esmaeilzadeh, and Nam Sung Kim. A SIMD-MIMD acceleration with access-execute decoupling for generative adversarial networks. SysML Conference (SysML), February 2018.
- Wen-mei Hwu, Izzat El Hajj, Simon Garcia, Carl Pearson, Nam Sung Kim, Deming Chen, Jinjun Xiong, and Zehra Sura. Rebooting the data access hierarchy in computing systems. IEEE International Conference on Rebooting Computing (ICRC), November 2017
- Daehoon Kim, Mohammad Alian, Jaehyuk Huh, and Nam Sung Kim. Janus: Supporting heterogeneous power management in virtualized environments. ACM Symposium on Cloud Computing (SoCC), September 2017.
- Sukhan Lee, Young Hoon Son, Hyunyoon Cho, Yuhwan Ro, Nam Sung Kim, and Jung Ho Ahn. Understanding and exploiting power-performance relationship of energy-efficient modern DRAM devices for chip multiprocessor workloads. IEEE International Symposium on Workload Characterization (IISWC), October 2017.
- Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, and Myoungsoo Jung. Understanding system characteristics of online erasure coding on scalable, distributed and large-scale SSD array systems. IEEE International Symposium on Workload Characterization (IISWC), October 2017.
- [IEEE/Amazon/DARPA Graph Challenge Champions, Honorable Mention] Ketan Date, Keven Feng, Rakesh Nagi, Jinjun Xiong, Nam Sung Kim, and Wen-mei Hwu. Collaborative (CPU + GPU) algorithms for triangle counting and truss decomposition on the Minsky architecture, IEEE High Performance Extreme Computing Conference (HPEC), September 2017.
- Dimitrios Skarlatos, Nam Sung Kim, and Josep Torrellas. Pageforge: A near-memory content-aware page-merging architecture. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2017.
- Michael Mishkin, Nam Sung Kim, and Mikko Lipasti. Temporal encoding in on-chip interconnects. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2017.
- Bingchao Li, Jizhou Sun, Murali Annavaram, and Nam Sung Kim. Elastic-cache: GPU cache architecture for efficient fine- and coarse-grained cache-line management. IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2017.
- [Best Paper Award Nomination] Mohammad Alian, Gabor Dozsa, Umur Darbaz, Stephan Diestelhorst, Dahoon Kim, and Nam Sung Kim. dist-gem5: Distributed simulation of computer clusters. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2017.
- [Best Paper Award Nomination -- Top 1.7% of all the submissions, IEEE Micro Top Picks Honorable Mention] Mohammad Alian, Ahmed Abulila, Lokesh Jindal, Dahoon Kim, and Nam Sung Kim. NCAP: Network-driven, packet context-aware power management for client-server architecture. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2017.
- Zhenhong Liu, Syed Gilani, Murali Annavaram, and Nam Sung Kim. G-Scalar: Cost-effective generalized scalar execution architecture for power-efficient GPUs. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2017.
- Sanguhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwangil Park, Seong Jin Jang, Joo Sun Choi, Gyo Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn and Nam Sung Kim. Defect analysis and cost-effective resilience architecture for future DRAM devices. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2017.
- [Workshop] Wayne Burleson, Shomit Das, Yasuko Eckert, and Nam Sung Kim. Heterogeneous computing – a path to post-Moore supercomputing: architecture, circuits, and process. Post-Moore’s Era Supercomputing (PMES) Workshop, November 2016.
- Hadi Asghari-Moghaddam, Young Hoon Son, Jung Ho Ahn, and Nam Sung Kim. Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2016.
- Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert Pilawa, Ulya Karpuzcu, Radu Teodorescu, Nam Sung Kim, and Josep Torrellas. Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2016.
- [Workshop] Amir Yazdanbakhsh, Jacob Sacks, Choungki Song, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh, Nam Sung Kim. NAX: Near data approximate computing. Workshop on Approximate Computing (AC), Oct 2016.
- S. Karen Khatamifard, Nam Sung Kim and Ulya Karpuzcu. VARIUS-TC: A modular architecture-level model of parametric variation for thin-channel switches. IEEE International Conference on Computer Design (ICCD), October 2016.
- Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, and Xiaoyao Liang. CNFET-based high throughput register file architecture. IEEE International Conference on Computer Design (ICCD), October 2016.
- Ting Wang, Nam Sung Kim, and Qiaang Xu. On effective and efficient quality management for approximate computing. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2016.
- Matthew Tomei, Henry Duwe, Nam Sung Kim, and Rakesh Kumar. Bit serializing a microprocessor for ultra-low-power. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), August 2016.
- Hadi Asgharimoghaddam, Hamid Reza Ghasemi, Abhishek A. Sinkar, and Nam Sung Kim. VR-Scale: Runtime dynamic phase scaling of processor voltage regulators for improving power efficiency. IEEE/ACM Design Automation Conference (DAC), June 2016.
- [Workshop] Michael Mishkin, Nam Sung Kim, and Mikko Lipasti. Write-after-Read Hazard prevention models in GPGPUSim. Workshop on Duplicating, Deconstructing and Debunking, June 2016.
- Paula Aguilera, Dong Ping Zhang, Nuwan Jayasena, and Nam Sung Kim. Fine-grained task migration for graph algorithms using processing in memory. Workshop on Advances in Parallel and Distributed Computational Models (APDCM), May 2016.
- Hao Wang, Jie Zhang, Sharmila Shridhar, Gieseo Park, Myoungsoo Jung, and Nam Sung Kim. DUANG: Lightweight page migration and adaptive asymmetry in memory systems. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2016.
- Bhargava Gopireddy, Choungki Song, Josep Torrellas, Nam Sung Kim, Aditya Agrawal, Asit Mishra. ScalCore: Designing a core for voltage scalability. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2016.
- Daniel Wong, Nam Sung Kim, and Murali Annavaram. Approximating warps with intra-warp operand value similarity. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2016.
- Daehoon Kim, Hwanju Kim, Nam Sung Kim, Jaehyuk Huh. vCache: Architectural support for transparent and isolated virtual LLCs in virtualized environments. IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2015.
- Hyeran Joen, Gokul Subramanian Ravi, Nam Sung Kim, and Murali Annavaram. GPU register file virtualization. IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2015.
- Hamid Reza Ghasemi, Ulya Karpuzcu, and Nam Sung Kim. Comparison of single-ISA heterogeneous versus wide dynamic range processors for mobile applications. IEEE International Conference on Computer Design (ICCD), October 2015.
- Sankaralingam Panneerselvam, Michael M. Swift, and Nam Sung Kim. Bolt: Faster reconfiguration in operating systems. USENIX Annual Technical Conference (ATC), July 2015.
- David Palframan, Nam Sung Kim, and Mikko Lipasti. COP: To compress and protect main memory. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2015.
- Amir Yazdanbakhash, David Palframan, Azadeh Davoodi, Nam Sung Kim, and Mikko Lipasti. Online and operand-aware detection of failures utilizing false alarm vectors. ACM Great Lake Symposium on VLSI (GLSVLSI), April 2015.
- Richard Berger, Richard Ferguson, Addison Floyd, and Nam Sung Kim. Next generation space processor study. Government Microcircuits Applications & Critical Technology (GOMACTech) Conference, March 2015.
- Young Hoon Son, Sukhan Lee, Seongil O Sanghyuk Kwon, Nam Sung Kim, and Jung Ho Ahn. CiDRA: A Cache-inspired DRAM resilience architecture. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2015.
- Hao Wang, Changjae Park, Gyungsu Byun, Jung Ho Ahn, and Nam Sung Kim. Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2015.
- Amin Farmahini-Farahani, Katherine Morrow, Jung Ho Ahn, and Nam Sung Kim. NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2015.
- David Palframan, Nam Sung Kim, and Mikko Lipasti. iPatch: Intelligent fault patching to improve energy efficiency. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2015.
- Paula Aguilera, Katherine Morrow, and Nam Sung Kim. Fair share: Allocation of GPU resources for both performance and fairness. IEEE International Conference on Computer Design (ICCD), October 2014.
- Hamid Reza Ghasemi and Nam Sung Kim. RCS: runtime resource and core scaling for power-constrained multi-core processors. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), August 2014.
- Hao Wang, Ripudaman Singh, and Nam Sung Kim. Memory scheduling towards high-throughput cooperative heterogeneous computing. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), August 2014.
- Young Hoon Son, Seongil O, Nam Sung Kim, and Jung Ho Ahn. Row-buffer decoupling: A case for low-latency DRAM microarchitecture. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2014.
- Yanpei Liu, Stark Draper, and Nam Sung Kim. SleepScale: Runtime joint speed scaling and sleep states management for power efficient data centers. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2014.
- Hoyoung Kim, Soojung Ryu, Abhishek Sinkar,and Nam Sung Kim. Quantitative comparison of the power reduction techniques Samsung reconfigurable processor. IEEE International Symposium Circuits and Systems (ISCAS), June 2014.
- Amin Farmahini-Farahani, Nam Sung Kim, and Katherine Morrow. Energy-efficient reconfigurable cache architectures for accelerator-enabled embedded systems. IEEE International Symposium on Perf. Analysis of Systems and Software (ISPASS), April 2014.
- Abhishek A. Sinkar, Hao Wang, and Nam Sung Kim. Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores. IEEE International Symposium on Quality Electronic Design (ISQED), March 2014.
- Ulya Karpuzcu, Ismail Akturk, and Nam Sung Kim. Accordion: Toward soft near-threshold voltage computing. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2014.
- David Palframan, Nam Sung Kim, and Mikko Lipasti. Precision-aware soft error protection for GPUs. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2014.
- Paula Aguilera, Jungseob Lee, Amin Farmahini Farahani, Michael Schulte, Katherine Morrow, and Nam Sung Kim. Variation-aware workload partitioning algorithms for GPUs supporting spatial multitasking. IEEE/ACM Design Automation and Test in European (DATE), March 2014.
- Paula Aguilera, Katherine Morrow, and Nam Sung Kim. QoS-aware dynamic resource allocation for spatial-multitasking GPUs. IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2014.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latencies. IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2013.
- Daniel Chang, Younghoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael Schulte, and Nam Sung Kim. Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. IEEE/ACM International Conference on Computer Aided Design (ICCAD), November 2013.
- Hao Wang, Abhishek A. Sinkar, and Nam Sung Kim. Improving platform energy-chip area trade-off in near-threshold computing environment. IEEE/ACM International Conference on Computer Aided Design (ICCAD), November 2013.
- Vignyan Naresh, Syed Gilani, Erika Gunadi, Nam Sung Kim, Michael Schulte, and Mikko Lipasti. REEL: Reducing effective execution latency of floating point operation. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), September 2013.
- Amir Yazdanbakhsh, David Palframan, Azadeh Davoodi, Nam Sung Kim, Mikko Lipasti. Online and operand-aware detection of failures by utilizing false alarm vectors. IEEE International Workshop on Logic and Synthesis (IWLS), June 2013.
- Jingwen Leng, Syed Gilani, Ahmed El-Shafiey, Tayler Hetherington, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi. GPUWattch: Enabling energy optimizations in GPGPUs. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2013.
- [Workshop] Euijin Kwon, Jae Young Jang, Jae W. Lee, and Nam Sung Kim. Optimal power allocation for multiprogrammed workload on single-chip heterogeneous processors. Workshop on Energy Efficient Design (WEED), June 2013.
- Yanpei Liu, Stark C. Draper, Nam Sung Kim. Queuing theoretic analysis of power-performance tradeoff in power-efficient computing. IEEE Conference on Information Sciences and Systems (CISS), March 2013.
- Ulya Karpuzcu, Abhishek Sinkar, Nam Sung Kim, and Josep Torrellas. EnergySmart: Toward energy-efficient manycores for near-threshold computing. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2013.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Power-efficient computing for compute-intensive GPGPU applications. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2013.
- Daniel W. Chang, Gyungsu Byun, Nam Sung Kim, and Michael J. Schulte. Reevaluating the latency claims of 3D stacked memories. IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2013.
- Vijay Sathish, Michael Schulte, and Nam Sung Kim. Lossless and lossy memory-link compression techniques for improving performance of memory-bound GPGPU workloads. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), September 2012.
- Hao Wang, Vijay Sathish, Ripudaman Singh, Michael Schulte, and Nam Sung Kim. Workload and power budget partitioning for single-chip heterogeneous processors. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), September 2012.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Power-efficient computing for compute-intensive GPGPU applications. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), September 2012.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Virtual floating-point units for low-power embedded processors. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2012.
- Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn, Syed Gilani, Michael Schulte, and Nam Sung Kim. A linear algebra core design for efficient level-3 BLAS. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2012.
- David Palframan, Nam Sung Kim, and Mikko Lipasti. Mitigating random variation with spare RIBs: Redundant intermediate bitslices. IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), June 2012.
- Ulya Karpuzcu, Krishna Kolluru, Nam Sung Kim, and Josep Torrellas. VARIUS-NT: A microarchitectural model of process variation for near-threshold voltage computing. IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), June 2012.
- Hamid Reza Ghasemi, Abhishek Sinkar, Michael Schulte, and Nam Sung Kim. Cost-effective power delivery to support per-core voltage domains for power-constrained processors. IEEE/ACM Design Automation Conference (DAC), June 2012.
- Abhishek Sinkar, Hao Wang, and Nam Sung Kim. Workload-aware voltage regulator optimization for power efficient multi-core processors. IEEE/ACM Design Automation and Test in European (DATE), March 2012.
- Jacob T. Adriaens, Katherine Compton, Nam Sung Kim, and Michael Schulte. The case for GPGPU spatial multitasking. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2012.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Energy-efficient floating-point arithmetic for low-power digital signal processors. IEEE Asilomar Conference on Signals Systems, and Computers, November 2011.
- Jungseob Lee, Vijay Satish, Katherine Compton, Michael Schulte, and Nam Sung Kim. Improving the throughput of power-constrained GPUs using dynamic voltage/frequency and core scaling. ACM International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2011.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Energy-efficient floating-point arithmetic for software-defined radio architectures. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), September 2011.
- Jungseob Lee, Vijay Satish, Katherine Compton, Michael Schulte, and Nam Sung Kim. Workload-aware throughput optimization of power-constrained GPGPUs. Semiconductor Research Corporation (SRC) Technical Conference (TECHCON), September 2011.
- Jacob T. Adriaens, Katherine Compton, Nam Sung Kim, Michael Schulte. The Case for GPGPU spatial multitasking. Semiconductor Research Corporation (SRC) Technical Conference (TECHCON), September 2011.
- Daniel Chang, Nam Sung Kim, and Michael Schulte. Analyzing the performance and energy impact of 3D memory integration on embedded DSPs. IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI), July 2011.
- Jungseob Lee, Paritosh Ajgaonkar, and Nam Sung Kim. Analyzing throughput of GPGPUs exploiting within-die core-to-core frequency variation. IEEE International Symposium on Perf. Analysis of Systems and Software (ISPASS), April, 2011.
- Krishna Bharath, Chunhua Yao, Nam Sung Kim, Parmesh Ramanathan, and Kewal Saluja. A low cost approach to calibrate on-chip temperature sensors. IEEE International Symposium on Quality Electronic Design (ISQED), March 2011.
- Syed Gilani, Nam Sung Kim, and Michael Schulte. Scratchpad memory optimizations for digital signal processing applications. IEEE/ACM Design Automation and Test in European (DATE), March 2011.
- David Palframan, Nam Sung Kim, and Mikko Lipasti. Time redundant parity for low-cost transient error detection. IEEE/ACM Design Automation and Test in European (DATE), March 2011.
- Hamid Reza Ghasemi, Stark Draper, and Nam Sung Kim. Low-voltage on-chip cache architecture using heterogeneous cell sizes for multi-core processors. IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2011.
- Abhishek Sinkar and Nam Sung Kim. AVS-aware power-gate sizing for maximum performance and power efficiency of power-constrained processors. IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2011.
- Erika Gunadi, Abhishek Sinkar, Nam Sung Kim, and Mikko Lipasti. Combating aging with the COLT duty cycle equalizer. IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2010.
- Danbee Park, Jungseob Lee, Nam Sung Kim, and Taewhan Kim. Optimal algorithm for profile-based power-gating: A compiler technique for reducing leakage on execution units in microprocessors. IEEE/ACM International Conference on Computer Aided Design (ICCAD’10), November 2010.
- Shi-Ting Zhou, Sumeet Katariya, Hamid Ghasemi, Stark Draper, and Nam Sung Kim. Minimizing total area of low-voltage SRAM arrays through joint optimization of cell size, redundancy, and ECC. IEEE International Conference on Computer Design (ICCD), October 2010.
- Jungseob Lee, Eric Wang, Hamid Ghasemi, Lloyd Bircher, Yu Cao, and Nam Sung Kim. Workload-adaptive process tuning strategy for power-efficient multi-core processors. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2010.
- Abhishek Sinkar and Nam Sung Kim. Analyzing and minimizing effects of temperature variation and NBTI on active leakage power of power-gated circuits. IEEE International Symposium on Quality Electronic Design (ISQED), March 2010.
- Dong-Keun Oh, Nam Sung Kim, Charlie Chen, and Yu-Hen Hu. The compatibility analysis of thread migration and DVFS in multi-core processor. IEEE International Symposium on Quality Electronic Design (ISQED), March 2010.
- Jungseob Lee, Shi-Ting Zhou, and Nam Sung Kim. Analyzing impact of multiple ABB and AVS domains on throughput of power and thermal-constrained multi-core processors. IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2010.
- Dong-Keun Oh, Nam Sung Kim, Charlie Chung Ping Chen, Yu-Hen Hu, and Azadeh Davoodi. Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors. IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), January 2010.
- [Workshop] Nam Sung Kim. Power-efficient computing through approximations and morphic primitives for future teraflops workloads. Workshop on New Directions in Computer Architecture (NDCA), December 2009.
- Abhishek Sinkar and Nam Sung Kim. Analyzing potential total power reduction with adaptive voltage positioning optimized for multicore processors. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2009.
- Jungseob Lee and Nam Sung Kim. Optimizing total power of many-core processor considering supply voltage scaling limit and process variations. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2009.
- Mike Anderson, Azadeh Davoodi, Abhishek Sinkar, Jungseob Lee, and Nam Sung Kim. Statistical static timing analysis considering leakage variability in power-gated design. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2009.
- Nam Sung Kim, June Seomun, Abhishek Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, and Youngsoo Shin. Frequency and yield optimizations in power-constrained designs. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2009.
- Jungseob Lee and Nam Sung Kim. Throughput analysis and optimization of power and thermal constrained multicore processors. IEEE/ACM Design Automation Conference (DAC), July 2009.
- Muhammad Khellah, Nam Sung Kim, Yibin Ye, Dinesh Somasekhar, Tanay Karnik, Nitin Borkar, Fatih Hamzaoglu, Tim Coan, Yih Wang, Kevin Zhang, Clair Webb, and Vivek De. PVT-variations and supply-noise tolerant 45nm dense cache arrays with diffusion-notch-free (DNF) 6T SRAM cells and dynamic multi-Vcc circuits. IEEE VLSI Circuit Symposium, June 2008.
- Keith Bowman, James Tschanz, Nam Sung Kim, Janice Lee, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, and Vivek K. De. Energy-efficient & metastability-immune timing-error detection and instruction replay-based recovery circuits for dynamic variation tolerance. IEEE International Solid-State Circuit Conference (ISSCC), February 2008.
- Keith Bowman, James Tschanz, Nam Sung Kim, Janice Lee, Chris Wilkerson, Shih.-Lien. Lu, Tanay Karnik, and Vivek De. Energy-efficient and metastability-immune timing-error detection and recovery circuits for dynamic variation tolerance. IEEE International Conference on Integrated Circuit Design and Technology (ICICDT), June 2008.
- DiaaEldin Khalil, Muhammad Khellah, Nam-Sung Kim, Yehea Ismail, Tanay Karnik, and Vivek De. SRAM dynamic stability estimation using MPFP. IEEE International Conference on Microelectronics (ICM), December 2007.
- Gregory Chen, David Blaauw, Trevor Mudge, Dennis Sylvester, and Nam Sung Kim. Yield-driven near-threshold SRAM design. IEEE/ACM International Conference on Computer Aided Design (ICCAD), November 2007.
- David Roberts, Nam Sung Kim and Trevor Mudge. On-chip cache device scaling limits and effective fault repair techniques in future nanoscale technology. IEEE Euro Micro Conference on Digital System Design (DSD), August 2007.
- James Tschanz, Nam Sung Kim, Saurabh Dighe, Jason Howard, Gregory Ruhl, Sriram Vangal, Siva Narendra, Yatin Hoskote, Howard Wilson, Carol Lam, Matthew Shuman, Carlos Tokunaga, Dinesh Somasekhar, Stephen Tang, David Finan, Tanay Karnik, Nitin Borkar, Nasser Kurd, and Vivek De. Adaptive frequency and biasing techniques for tolerance to dynamic temperature-voltage variations and aging. IEEE International Solid-State Circuit Conference (ISSCC), February 2007.
- Muhammad Khellah, Yibin Ye, Nam Sung Kim, Dinesh Somasekhar, Gunjan Pandya, Ali Farhang, Kevin Zhang, and Vivek De. Wordline & bitline pulsing schemes for improving SRAM cell stability in low-Vcc 65nm CMOS designs. IEEE VLSI Circuit Symposium, June 2006.
- Muhammad Khellah, Nam Sung Kim, Jason Howard, Greg Ruhl, Yibin Ye, Dinesh Somasekhar, Nitin Borkar, Fatih Hamzaoglu, Gunjan Pandya, Ali Farhang, Kevin Zhang, and Vivek De. A 4.2GHz 0.3mm2 256kb Dual-Vcc SRAM Building Block in 65nm CMOS. IEEE International Solid-State Circuit Conference (ISSCC), February 2006.
- Nam Sung Kim, Vivek De, and Trevor Mudge. Total power-optimal pipelining and parallel processing under process variations in nanometer technology. IEEE/ACM International Conference on Computer Aided Design (ICCAD), November 2005.
- Robert Bai, Nam Sung Kim, Dennis Sylvester, and Trevor Mudge. Total leakage optimization strategies for multi-level caches. IEEE/ACM Great Lake Symposium on VLSI (GLSVLSI), April, 2005.
- Robert Bai, Nam Sung Kim, Dennis Sylvester, and Trevor Mudge. Power-performance trade-offs in nanometer scale multi-level caches considering total leakage power. IEEE/ACM Design Automation and Test in Europe (DATE), March 2005.
- Nam Sung Kim, Valeria Bertaco, Todd Austin, and Trevor Mudge. Microarchitectural power modeling technique for deep sub-micron processors. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2004.
- Nam Sung Kim and Trevor Mudge. Single-VDD and single-VT super-drowsy techniques for low-leakage high-performance instruction caches. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2004.
- [IEEE Micro Top Picks] Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev Rao, Toan Pham, Conrad Ziesler, David Blaauw, Todd Austin, Krisztián Flautner, and Trevor Mudge. Razor: A low-power pipeline based on circuit-level timing speculation. IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2003.
- Nam Sung Kim, David Blaauw, and Trevor Mudge. Leakage power optimization techniques for ultra deep sub-micron multi-level caches. IEEE/ACM International Conference on Computer Aided Design (ICCAD), November 2003.
- Nam Sung Kim, Trevor Mudge, and Richard Brown. A 2.3Gb/s fully integrated and synthesizable Rijndael core. IEEE Custom Integrated Circuit Conference (CICC), September 2003.
- Nam Sung Kim and Trevor Mudge. The microarchitecture for a low power register file. IEEE/ACM International Symposium on Low Power Electronic Design (ISLPED), August 2003.
- Nam Sun Kim and Trevor Mudge. Reducing register ports using delayed write-back queue and operand pre-fetch. ACM International Conference on Supercomputing (ICS), June 2003.
- Nam Sung Kim, Krisztián Flautner, David Blaauw, and Trevor Mudge. Drowsy instruction caches – Reducing leakage power using dynamic voltage scaling and cache sub-bank prediction. IEEE/ACM International Symposium on Microarchitecture (MICRO), November 2002.
- Krisztián Flautner, Nam Sung Kim, Steven Martin, David Blaauw, and Trevor Mudge. Drowsy Caches: Simple techniques for reducing leakage power. IEEE/ACM International Symposium on Computer Architecture (ISCA), May 2002.
- Namseung Kim, Hoon Choi, Seungjong Lee, Seungwang Lee, In-Cheol Park, and Chong-Min Kyung. Virtual chip: making functional model work on real target systems. IEEE/ACM Design Automation Conference (DAC), June 1998.
Patents
- Nam Sung Kim, LI Youjie, Alexander Gerhard Schwing. Network-centric architecture and algorithms to accelerate distributed training of neural networks. Application Number: US20210374503A1
- Nam Sung Kim, Hadi Esmaeilzadeh, Amir Yazdanbakhsh. In-memory near-data approximate acceleration. Application Number: US20210382691A1
- Mohammad Alian and Nam Sung Kim. Network-driven, packet context-aware power management for client-server architecture. Application Number: US20190004594A1.
- O Seong-il, Nam Sung Kim, Son Young-Hoon, Chan-kyung Kim, Ho-young Song, Jung Ho Ahn, and Sang-joon Hwang. Memory module, memory device, and processing device having a processor mode, and memory system. Patent number: US10416896B2.
- Hao Wang and Nam Sung Kim. Computer architecture having selectable, parallel and serial communication channels between processors and memory. Patent number: US10108220B2.
- Nam Sung Kim and Zhenhong Liu. Graphic processor unit providing reduced storage costs for similar operands. Patent number: US10592466B2.
- Hao Wang and Nam Sung Kim. Shared row buffer system for asymmetric memory. Patent number: US9959205B2.
- Jung Ho Ahn and Nam Sung Kim. Memory system and method for error correction of memory. Patent number: US9886340B2.
- Nam Sung Kim, James M. O'Connor, Michael J. Schulte, and Vijay Janapa Reddi. Method and apparatus for power reduction during lane divergence. Patent number: US9690350B2.
- Srinivasan Narayanamoorthy and Nam Sung Kim. Multiplication circuit providing dynamic truncation. Patent number: 9639328.
- David John Palframan, Nam Sung Kim, and Mikko Lipasti. Memory fault patching using pre-existing memory structures. Patent number: US9626297.
- Nam Sung Kim. Resource and core scaling for improving performance of power-constrained multi-core processors. Patent number: US9606842.
- Ho-Young Kim, Nam-Sung Kim, and Daniel W Chang. Apparatus and method for adjusting bandwidth. Patent number: US9588570.
- Nam Sung Kim. Voltage Regulator control for improved computing power efficiency. Patent number: US9547355.
- Nam Sung Kim, Syed Gilani, and Michael Schulte. High efficiency computer floating point multiplier unit. Patent number: US9519459.
- Nam Sung Kim. Energy-efficient multicore processor architecture for parallel processing. Patent number: US9519330.
- Hao Wang and Nam Sung Kim. Memory controller for heterogeneous computer. Patent number: US9501227.
- Nam Sung Kim. Signal processing circuit with multiple power modes. Patent number: US9497381.
- Nam Sung Kim. Multiplier circuit with dynamic energy consumption adjustment. Patent number: US9323498.
- Nam Sung Kim. Dynamic error handling for on-chip memory structures. Patent number: US9323614.
- David John Palframan, Nam Sung Kim, and Mikko Lipasti. Method and apparatus for soft error mitigation in computers. Patent number: US9235461.
- Nam Sung Kim. Memory-link compression for graphic processor unit. Patent number: US9189394.
- Keith A. Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson, Shih-Lien L. Lu, Tanay Karnik, and Vivek K. De. Sequential circuit with error detection. Patent number: US8301970
- Nam Sung Kim. Leakage power management using programmable power gating transistors and on-chip aging and temperature tracking circuit. Patent number: US8736314.
- Nam Sung Kim and Stark C Draper. Energy efficient processor having heterogeneous cache. Patent number: US8687453.
- Keith A. Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson, Shih-Lien L. Lu, Tanay Karnik, and Vivek K. De. Sequential circuit with error detection. Patent number: US8301970
- Nam Sung Kim. Method and apparatus for optimizing clock speed and power dissipation in multicore architectures. Patent number: US8281164.
- Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, and Vivek De. Memory cell supply voltage control based on error detection. Patent number: US8006164.
- Nam Sung Kim and Vivke De. Sleep transistor array apparatus and method with leakage control circuitry. Patent number: US7812631.
- James W. Tschanz, Keith A. Bowman, Nam Sung Kim, Chris Wilkerson, Shih-Lien L. Lu, and Tanay Karnik. Delay fault detection using latch with error sampling. Patent number: US7653850.
- Nam Sung Kim, Muhammad M. Khellah, Yibin Ye, Dinesh Somasekhar, and Vivek De. Memory cell bit value loss detection and restoration. Patent number: US7653846.
- Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, and Vivek De. Memory having bit line with resistor(s) between memory cells. Patent number: US7558097.
- Dinesh Somasekhar, Muhammad M. Khellah, Yibin Ye, Nam Sung Kim, and Vivek K. De. Sense amplifier method and arrangement. Patent number: US7532528.
- Fatih Hamzaoglu, Kevin Zhang, Nam Sung Kim, Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Vivek K. De, and Bo Zheng. Memory with dynamically adjustable supply. Patent number: US7403426.
- Muhammad M. Khellah, Dinesh Somasekhar, Nam Sung Kim, Yibin Ye, Vivek K. De, Kevin Zhang, and Bo Zheng. Memory cell having P-type pass device. Patent number: US7230842.
- Krisztian Flautner, David T. Blaauw, Trevor N. Mudge, Nam Sung Kim, and Steven M. Martin. Data processor memory circuit. Patent number: US7055007.
Conferences Organized or Chaired
- Program co-chair, Workshop on Near‐threshold Computing (WNTC), 2012.
Other Scholarly Activities
- Program committee member, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2025
- Program committee member, ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2025.
- Guest Editor, IEEE Micro Magazine, special issue on interconnects for chiplet integration technologies, 2024.
- Program committee member, IEEE/ACM International Symposium on Microarchitecture (MICRO), 2024.
- Program committee member (Regular Track), IEEE/ACM International Symposium on Computer Architecture (ISCA), 2024.
- Program committee member (Industrial Track), IEEE/ACM International Symposium on Computer Architecture (ISCA), 2024.
- Program committee member, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024.
- Program committee member (Industrial Track), IEEE/ACM International Symposium on Computer Architecture (ISCA), 2023.
- Guest Editor, IEEE Micro Magazine, special issue on emerging system interconnects, 2023.
- Forum speaker, IEEE International Solid-State Circuit Conference (ISSCC), February, 2022.
- Panelist, IEEE International Solid-State Circuit Conference (ISSCC), February, 2022.
- Program committee member, Hot Chips, 2022.
- Keynote speaker, IEEE International Symposium on High-Performance Computer Architecture (HPCA), March 2021.
- Program committee member, Hot Chips, 2021.
- Program committee member (Industrial Track), IEEE/ACM International Symposium on Computer Architecture (ISCA), 2021.
- Program committee member, Conference on Neural Information Processing Systems (NIPS), 2019.
- Invited talk speaker, Nam Sung Kim. IEEE/ACM Design Automation Conference (DAC), June 2019.
- Program committee member, IEEE/ACM International Symposium on Computer Architecture (ISCA), 2019.
- Plenary talk speaker, Nam Sung Kim. Practical Challenges in Supporting Function in Memory. IEEE Asian-Solid-State Circuit Conference (A-SSCC), October, 2018.
- Program committee member, IEEE/ACM International Symposium on Computer Architecture (ISCA), 2018.
- Program committee member, IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA), 2017.
- Tutorial organizer, dist-gem5 – Modeling and simulating a distributed computer system using multiple simulation hosts. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2017.
- Program committee member, IEEE/ACM International Symposium on Computer Architecture (ISCA), 2017.
- Program committee member, IEEE/ACM Design Automation Conference (DAC), 2017.
- Selection committee member, IEEE Micro Top Picks, 2017.
- External review committee member, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2017
- Program committee member, IEEE/ACM International Symposium on Microarchitecture (MICRO), 2016.
- Program committee member, Workshop on Approximate Computing (AC), 2016.
- Program committee member, Journal of Instruction-Level Parallelism Workshop on Computer Architecture Competitions (JWAC): Championship Branch Prediction (CBP), 2016.
- Publicity chair, IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA), 2016.
- Tutorial organizer, dist-gem5 – Modeling and simulating a distributed computer system using multiple simulation hosts. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2015.
- Program committee member, IEEE/ACM Design Automation Conference (DAC), 2015.
- External review committee member, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2015.
- Program committee member, IEEE/ACM International Symposium on Microarchitecture (MICRO), 2015.
- Program committee member, IEEE International Symposium on Perf. Analysis of Systems and Software (ISPASS), 2015
- Tutorial speaker, GPUWattch – A framework for energy-aware optimizations in manycore GPGPU architectures. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2014.
- Program committee member, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2014.
- Program committee member, IEEE International Conference on High Performance Computing (HiPC), 2014.
- Panelist, ISAT/DARPA Workshop on Accuracy Trade-Offs Across the System Stack for Performance and Energy, 2014.
- Program committee member, IEEE/ACM International Symposium on Low Power Electronics Design (ISLPED), 2014.
- External review committee member, ACM International Conference on Supercomputer (ICS), 2014.
- Tutorial speaker, GPUWattch – A framework for energy-aware optimizations in manycore GPGPU architectures. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2014.
- Program committee member, IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2013.
- Program committee member, IEEE/ACM International Symposium on Low Power Electronics Design (ISLPED), 2013.
- Panelist, National Science Foundation, 2012.
- Program committee member, IEEE/ACM International Symposium on High-Performance Computer Architecture (ISCA), 2012.
- Panelist, National Science Foundation, 2012.
- Program committee member, IEEE International Conference on Computer Design (ICCD), 2012.
- Invited talk, SRAM scaling limit: Its circuit & architecture solutions. SRC/NSF/A*STAR Forum on 2020 Semiconductor Memory Strategies, 2009.
- Panelist, Annual Workshop on Duplication, Deconstructing, and Debunking (WDDD), 2009.
- Program committee, IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2009.
- Tutorial speaker, Circuit & CAD techniques for low-power design. IEEE/ACM Design Automation Conference, 2007.
- Program committee, IEEE/ACM Design Automation Conference (DAC), 2007.
- Tutorial speaker, Microprocessor memory array circuit for architects. IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2007.
- Program committee, IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2007.
- Program committee, IEEE International Conference on High-Performance Computer Architecture (HPCA), 2007.
- Program committee, IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2006.
- Tutorial speaker, Microprocessor memory array circuit for architects. IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2007.
- Program committee, IEEE International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), 2006.
- Tutorial speaker, Robust and low power computing. IEEE/ACM International Symposium on Microarchitecture (MICRO), 2004.
Honors
- Intel SRS Outstanding Researcher Award (2024 (Apr))
- National Academy of Inventors (NAI) Fellow (2024 (Jan))
- IEEE International Symposium on Workload Characterization (IISWC) Best Paper Runner-up Award (2023 (Oct))
- Best of IEEE Computer Architecture Letters (CAL) Paper Award (2023)
- IEEE Int. Symp. on Workload Characterization (IISWC) Best Paper Runner-up Award (2023)
- ISCA@50 Retrospective: 1996-2020 Selection (2023)
- IEEE Micro Top Picks, Honorable Mention (2022)
- SIGMICRO 2021 Test of Time Awards (2021)
- W.J. ‘Jerry’ Sanders III – Advanced Micro Devices, Inc. Endowed Chair Professor (2021)
- IEEE Micro Top Picks (2021)
- ACM Fellow (2021)
- IEEE International Conference on VLSI Design (VLSID) Best Paper Award (2020)
- IEEE/ACM Int. Symp. on Computer Architecture (ISCA) Hall of Fame (2019)
- IEEE Micro Top Picks, Honorable Mention (2019)
- IEEE/ACM In. Symp. on Microarchitecture (MICRO) Best Paper Award Nomination (2018)
- IEEE Int. Symp. on Workload Characterization (IISWC) Best Paper Award Nomination (2018)
- IEEE Micro Top Picks, Honorable Mention (2018)
- IEEE/Amazon/DARPA Graph Challenge Champions, Honorable Mention (2017)
- ACM SIGARCH/IEEE-CS TCCA Influential Int. Symp. on Computer Architecture (ISCA) Paper Award (2017)
- IEEE Int. Symp. on Performance Analysis of Systems and Software (ISPASS) Best Paper Award Nomination (2017)
- IEEE Int. Symp. on High-Performance Computer Architecture (HPCA) Best Paper Award Nomination (2017)
- IEEE/ACM Int. Symp. on Microarchitecture (MICRO) Hall of Fame (2016)
- IEEE Fellow (2016)
- IEEE Int. Symp. on High-Performance Computer Architecture (HPCA) Hall of Fame (2015)
- University of Wisconsin Villas Associate Award (2015)
- IBM Faculty Award (2012)
- IBM Faculty Award (2011)
- National Science Foundation (NSF) Faculty Early Career Award (2010)
- IEEE/ACM Int. Symp. on Microarchitecture (MICRO) Best Paper Award (2003)
- IEEE Micro Top Picks (2004)
- Intel Graduate Fellowship (2002)
- IEEE/ACM Design Automation Conference (DAC) Student Design Contest Award (2001)
Teaching Honors
- University of Illinois List of Teachers Ranked as Excellent by Their Students (Spring 2022)
- University of Illinois List of Teachers Ranked as Excellent by Their Students (Spring 2018)
- University of Illinois List of Teachers Ranked as Excellent by Their Students (Fall 2017)
- University of Illinois List of Teachers Ranked as Excellent by Their Students (Spring 2016)
Recent Courses Taught
- ECE 411 - Computer Organization & Design
- ECE 498 RK - Concepts in Computer Org & Des
- ECE 512 - Computer Microarchitecture