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Goddard discusses challenges and solutions for detecting microelectronic defects



Lynford L Goddard
Lynford L Goddard
In an article from SIGNAL magazine, AFCEA's international news magazine, ECE ILLINOIS Professor Lynford L Goddard gave his thoughts on how to detect microelectronic defects. As semiconductors are produced on a smaller scale, it becomes harder to detect the tiny defects that are accidentally created during the fabrication process. 

"Harnessing optical methods for semiconductor wafer inspection is one way to effectively look for anomalies," said Goddard in the article. "In manufacturing semiconductor chips, there’s typically many steps in the fabrication process, and being able to see defects that are inadvertently introduced at different steps in the process is one of the grand challenges for the industry.”

Some of these defects can be harmless, but others can be lethal to the entire chip which is costly for manufacturers. “These billion-dollar fabrication plants are processing wafers now that are the size of an extra-large pizza, 18 inches in diameter. A single nanoscale defect can, if it’s repeated across the wafer, ruin an entire wafer,” Goddard stated to SIGNAL magazine. “And these wafers cost millions of dollars each. One [sheet] gets cut up into thousands of different processing units with each of them retailing at $500 to $1,000 apiece, so you can imagine how important it is to avoid these killer defects.”

Gabriel Popescu
Gabriel Popescu
However, Goddard offered a solution for detecting these defects. 10 years ago, Goddard and ECE ILLINOIS Professor Gabriel Popescu developed optical techniques for quantitative phase imaging of materials as part of a $2 million research grant from the NSF. Later, the researchers used those techniques to detect semiconductor defects in a multiyear project funded by the Semiconductor Research Corp.

Although it's getting more difficult to collect samples due to their shrinking size, Goddard hopes to continue his experiment in measuring possible defects. “A decade ago, chips at the 65-nanometer technology node were something that a hundred or so facilities throughout the world could make," said Goddard. "A wafer at the 5-nanometer node was only realized last year by a team at IBM. This year, only two or three companies can manufacture a circuit that complex with that small of dimensions."

"The need from the semiconductor manufacturing industry to be able to validate circuits will only grow in the future." 


Read more from SIGNAL magazine at the AFCEA site