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Shanbhag reimagines von Neumann architecture

3/29/2018

Joseph Park, ECE ILLINOIS

At the International Solid-State Circuits Conference (ISSCC) this past February, ECE ILLINOIS Professor and Jack S. Kilby Professor of Electrical and Computer Engineering Naresh R Shanbhag and others made a case for a new architecture that will bring computing and memory closer together. Shanbhag believes that now is the time to switch to a different design that will be more accommodating for today's data-intensive tasks.

Naresh R Shanbhag
Naresh R Shanbhag

"The idea is not to replace the processor altogether but to add new functions to the memory that will make devices smarter without requiring more power," explained an article in IEEE Spectrum. The researchers believe that in order to bring artificial intelligence out of the cloud and into consumer electronics, industry must adapt.

Shanbhag and his group envision sticking with existing materials for this new design, "using the analog control circuits that surround arrays of memory cells" to run simple artificial intelligence algorithms instead of sending data out to the processor. In consideration of storage density, Shanbhag does not want to break up memory subarrays with processing circuits and believes that processing at the edges of subarrays is "deep enough to get an energy and speed advantage without losing storage."

Using analog circuits to detect faces in images stored in static RAM, Shanbhag's group discovered that there was a tenfold improvement in energy efficiency and a fivefold improvement in speed. Shanbhag is also affiliated with the CSL. 

Read the full article, "To Speed Up AI, Mix Memory and Proceessing," in IEEE Spectrum.