ACM SIGARCH honors Kim's influential drowsy caches research

5/30/2017 CSL Newsroom

Kim's 2002 paper inspired many other researchers in the circuit and architecture community, leading to more than 1,000 citations and industry adoption of his design techniques.

Written by CSL Newsroom

ECE ILLINOIS Associate Professor Nam Sung Kim, researching at the Coordinated Science Laboratory, has been awarded the 2017 ACM SIGARCH and IEEE-CS TCCA ISCA Influential Paper Award. The honor will be presented at the International Symposium on Computer Architecture, the largest conference in its field, this June in Toronto. This award recognizes the paper from the ISCA Proceedings 15 years earlier that has had the most impact on the field during the intervening years.

Kim’s paper, “Drowsy Caches: Simple Techniques for Reducing Leakage Power,” made a pioneering contribution in the development of more energy-efficient microprocessors, which are the heart of computers. Microprocessors have become ever faster and more capable due to the extraordinary rate of semiconductor technology scaling, but the increase of power consumption has begun to impede further improvement in performance required for emerging applications that can revolutionize our everyday life. Consequently, improving power efficiency of microprocessors has become a grand challenge for researchers in both academia and industry.

Nam Sung Kim
Nam Sung Kim

As a doctoral student, Kim proposed a new circuit and architecture cross-cutting design technique that tackled microprocessor design challenges associated with the increase of power consumption in the circuit and architecture communities. He proposed “Drowsy Caches” that place infrequently used cache lines into “drowsy mode” to reduce power consumption of on-chip caches that were responsible for a significant fraction of total power consumption of microprocessors. He then demonstrated that the synergy between simple circuit- and architecture-level techniques could allow microprocessors to more efficiently and aggressively reduce power consumption without incurring notable performance degradation.

This paper has inspired many other researchers in the circuit and architecture community, leading to more than 1,000 citations according to Google Scholar, and industry adoption of these design techniques. ARM – a leader in microprocessor intellectual property used in more than 60% of the world's mobile devices – licensed patents associated with Drowsy Caches, and on-chip cache design and management techniques similar to Drowsy Caches are used by practically all commercial microprocessors.

“It is unlikely that complex schemes are adopted by commercial products because the state-of-the-art commercial microprocessors are already very complex and adding even a simple feature to them requires product engineers to spend a significant amount of time for design and verification," said Kim, a member of the ECE ILLINOIS faculty. “I believe this scheme based on interdisciplinary insights has become very popular and has been adopted by commercial products because it is so simple and intuitive.”

This story first appeared on the Coordinated Science Lab website.

More about Professor Kim's award can be found on The Korea Times website.


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This story was published May 30, 2017.