Scaling transistors and following Moore’s Law have served our industry well for more than 50 years in providing integrated circuits that are denser, cheaper, higher performance, and lower power. Despite occasional reports of its demise, Moore’s Law is alive and well. We’ve continually invented new materials and new device structures to deliver the expected benefits of scaling, and will continue to do so for the foreseeable future. This presentation will describe Intel’s latest 10 nm logic technology and some of the device options being explored in research for future scaling.
Mark Bohr is an Intel Senior Fellow and Director of Process Architecture and Integration. He joined Intel in 1978 after graduating from the University of Illinois with a MSEE and is a member of the Logic Technology Development group located in Hillsboro, Oregon. Mark is currently directing early process development activities for Intel’s 5 nm generation logic technology. He is an IEEE Fellow and a member of the U.S. National Academy of Engineering. He holds 84 patents in the area of integrated circuit processing and has authored or co-authored 50 published papers.